Inventor

PRETE EDOARDO

DE24 patents

⚠️ This page may combine multiple inventors who share the name “PRETE EDOARDO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PRETE EDOARDO

ADVANCED MICRO DEVICES INC

Common mode extraction and tracking for data signaling

Integrated controller for training memory physical layer interface

Channel training using a replica lane

Channel training using a replica lane

Periodic receiver clock data recovery with dynamic data edge

Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links

Low power VTT generation mechanism for receiver termination

Receiver equalization circuitry using variable termination and T-coil

Clock frequency divider circuit

Asynchronous feedback training

INFINEON TECHNOLOGIES AG

Clock signal extraction device and method for extracting a clock signal from data signal

Clock and data recovery circuit having gain control

Method and apparatus for phase detection

Method and arrangement for frequency doubling

Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals

QIMONDA AG

Apparatus and method for switching an apparatus to a power saving mode

Data sampler including a first stage and a second stage

Apparatus and method for providing a signal for transmission via a signal line

Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage

DEARTH GLENN A

Method and apparatus for memory access delay training

BRANDL KEVIN M

DDR receiver enable cycle training

NYGREN AARON

System and method of data communications between electronic devices

LANTIQ DEUTSCHLAND GMBH

Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator

MANGASER RAMON

Method and apparatus for using DFE in a system with non-continuous data