Inventor
CHA JAE HAN
KR19 patents
⚠️ This page may combine multiple inventors who share the name “CHA JAE HAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MAGNACHIP SEMICONDUCTOR LTD
6 patentsUS8362556B2Jan 29, 2013
Semiconductor device
MAGNACHIP SEMICONDUCTOR LTD7 citations83
US8853787B2Oct 7, 2014
High voltage semiconductor device
MAGNACHIP SEMICONDUCTOR LTD5 citations72
US8969161B2Mar 3, 2015
Semiconductor device and method for fabricating semiconductor device
MAGNACHIP SEMICONDUCTOR LTD3 citations62
US9099557B2Aug 4, 2015
Semiconductor device
MAGNACHIP SEMICONDUCTOR LTD0 citations51
US8716796B2May 6, 2014
Semiconductor device
MAGNACHIP SEMICONDUCTOR LTD0 citations51
US8692328B2Apr 8, 2014
Semiconductor device
MAGNACHIP SEMICONDUCTOR LTD0 citations51
CHA JAE-HAN
6 patentsUS8981453B2Mar 17, 2015
Nonvolatile memory device and method for fabricating the same
CHA JAE-HAN8 citations82
US8575702B2Nov 5, 2013
Semiconductor device and method for fabricating semiconductor device
CHA JAE-HAN11 citations82
US8546883B2Oct 1, 2013
Semiconductor device
CHA JAE-HAN4 citations61
US8076726B2Dec 13, 2011
Semiconductor device
CHA JAE-HAN2 citations61
US8552497B2Oct 8, 2013
Semiconductor device
CHA JAE-HAN0 citations50
US8546881B2Oct 1, 2013
Semiconductor device
CHA JAE-HAN1 citations50
HYNIX SEMICONDUCTOR INC
5 patentsUS6815305B2Nov 9, 2004
Method for fabricating BICMOS semiconductor devices
HYNIX SEMICONDUCTOR INC7 citations73
US6784063B2Aug 31, 2004
Method for fabricating BiCMOS transistor
HYNIX SEMICONDUCTOR INC5 citations62
US6969665B2Nov 29, 2005
Method of forming an isolation film in a semiconductor device
HYNIX SEMICONDUCTOR INC0 citations51
US6740572B2May 25, 2004
Method for fabricating CMOS transistor of a semiconductor device
HYNIX SEMICONDUCTOR INC1 citations51
US6759294B2Jul 6, 2004
Method of forming a capacitor in a semiconductor device
HYNIX SEMICONDUCTOR INC0 citations41
GLOBALFOUNDRIES SG PTE LTD
2 patentsUS9653365B1May 16, 2017
Methods for fabricating integrated circuits with low, medium, and/or high voltage transistors on an extremely thin silicon-on-insulator substrate
GLOBALFOUNDRIES SG PTE LTD2 citations71
US10395987B2Aug 27, 2019
Transistor with source-drain silicide pullback
GLOBALFOUNDRIES SG PTE LTD0 citations40