Inventor
DOUGLASS STEPHEN M
US23 patents
⚠️ This page may combine multiple inventors who share the name “DOUGLASS STEPHEN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
11 patentsUS6886092B1Apr 26, 2005
Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion
XILINX INC96 citations98
US6522167B1Feb 18, 2003
User configurable on-chip memory system
XILINX INC93 citations98
US7269805B1Sep 11, 2007
Testing of an integrated circuit having an embedded processor
XILINX INC70 citations97
US6798239B2Sep 28, 2004
Programmable gate array having interconnecting logic to support embedded fixed logic circuitry
XILINX INC62 citations95
US6662285B1Dec 9, 2003
User configurable memory system having local and global memory blocks
XILINX INC73 citations93
US7420392B2Sep 2, 2008
Programmable gate array and embedded circuitry initialization and processing
XILINX INC35 citations92
US6693452B1Feb 17, 2004
Floor planning for programmable gate array having embedded fixed logic circuitry
XILINX INC24 citations92
US7406670B1Jul 29, 2008
Testing of an integrated circuit having an embedded processor
XILINX INC14 citations84
US7194600B2Mar 20, 2007
Method and apparatus for processing data with a programmable gate array using fixed and programmable processors
XILINX INC10 citations84
US6961919B1Nov 1, 2005
Method of designing integrated circuit having both configurable and fixed logic circuitry
XILINX INC19 citations84
US7539848B1May 26, 2009
Configurable logic fabric including two fixed logic processors with individual interface to receive availability signal from custom operation code configured processor
XILINX INC5 citations74
CYPRESS SEMICONDUCTOR CORP
11 patentsUS5023484AJun 11, 1991
Architecture of high speed synchronous state machine
CYPRESS SEMICONDUCTOR CORP70 citations95
US5621338AApr 15, 1997
High speed configuration independent programmable macrocell
CYPRESS SEMICONDUCTOR CORP63 citations94
US4879481ANov 7, 1989
Dual I/O macrocell for high speed synchronous state machine
CYPRESS SEMICONDUCTOR CORP65 citations94
US5467029ANov 14, 1995
OR array architecture for a programmable logic device
CYPRESS SEMICONDUCTOR CORP46 citations93
US6243664B1Jun 5, 2001
Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
CYPRESS SEMICONDUCTOR CORP7 citations73
US5923868AJul 13, 1999
Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
CYPRESS SEMICONDUCTOR CORP5 citations73
US5848066ADec 8, 1998
Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
CYPRESS SEMICONDUCTOR CORP7 citations73
US5689686ANov 18, 1997
Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
CYPRESS SEMICONDUCTOR CORP8 citations73
US5502403AMar 26, 1996
High speed configuration independent programmable macrocell
CYPRESS SEMICONDUCTOR CORP15 citations72
USRE37577EMar 12, 2002
High speed configuration independent programmable macrocell
CYPRESS SEMICONDUCTOR CORP4 citations61
US5701092ADec 23, 1997
OR array architecture for a programmable logic device
CYPRESS SEMICONDUCTOR CORP0 citations49