Inventor
SHIMBO MASAFUMI
JP17 patents
⚠️ This page may combine multiple inventors who share the name “SHIMBO MASAFUMI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SEIKO INSTR & ELECTRONICS
9 patentsUS4624737ANov 25, 1986
Process for producing thin-film transistor
SEIKO INSTR & ELECTRONICS132 citations96
US4705358ANov 10, 1987
Substrate for active matrix display
SEIKO INSTR & ELECTRONICS39 citations92
US4601097AJul 22, 1986
Method of producing thin-film transistor array
SEIKO INSTR & ELECTRONICS49 citations92
US4442448AApr 10, 1984
Logic integrated circuit device
SEIKO INSTR & ELECTRONICS31 citations92
US4393574AJul 19, 1983
Method for fabricating integrated circuits
SEIKO INSTR & ELECTRONICS10 citations73
US4352238AOct 5, 1982
Process for fabricating a vertical static induction device
SEIKO INSTR & ELECTRONICS9 citations73
US4635089AJan 6, 1987
MIS-integrated semiconductor device
SEIKO INSTR & ELECTRONICS3 citations62
US4449284AMay 22, 1984
Method of manufacturing an integrated circuit device having vertical field effect transistors
SEIKO INSTR & ELECTRONICS5 citations62
US4380481AApr 19, 1983
Method for fabricating semiconductor devices
SEIKO INSTR & ELECTRONICS5 citations62
SEIKO INSTR INC
6 patentsUS4924279AMay 8, 1990
Thin film transistor
SEIKO INSTR INC60 citations96
US4838993AJun 13, 1989
Method of fabricating MOS field effect transistor
SEIKO INSTR INC102 citations96
US5036374AJul 30, 1991
Insulated gate semiconductor device using compound semiconductor at the channel
SEIKO INSTR INC36 citations92
US4980306ADec 25, 1990
Method of making a CMOS device with trench isolation device
SEIKO INSTR INC54 citations92
US4845046AJul 4, 1989
Process for producing semiconductor devices by self-alignment technology
SEIKO INSTR INC32 citations92
US4939154AJul 3, 1990
Method of fabricating an insulated gate semiconductor device having a self-aligned gate
SEIKO INSTR INC22 citations82