Inventor · disambiguated record
Christian Zistl
Also filed as: ZISTL CHRISTIAN
13 granted patents·1 pending application·203 citations·filing 2000–2005
92Inventor score
Top patents by PatentIndex Score
14 records- 0191US6261963B1Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devicesADVANCED MICRO DEVICES INC·Filed 2000·Granted Jul 17, 2001·62 cites·40 claims
- 0279US7416992B2Method of patterning a low-k dielectric using a hard maskADVANCED MICRO DEVICES INC·Filed 2005·Granted Aug 26, 2008·7 cites·20 claims
- 0377US6610594B2Locally increasing sidewall density by ion implantationADVANCED MICRO DEVICES INC·Filed 2001·Granted Aug 26, 2003·20 cites·45 claims
- 0477US6500755B2Resist trim process to define small openings in dielectric layersADVANCED MICRO DEVICES INC·Filed 2000·Granted Dec 31, 2002·18 cites·23 claims
- 0576US6806191B2Semiconductor device with a copper line having an increased resistance against electromigration and a method of forming the sameADVANCED MICRO DEVICES INC·Filed 2002·Granted Oct 19, 2004·20 cites·21 claims
- 0676US6514844B1Sidewall treatment for low dielectric constant (low K) materials by ion implantationADVANCED MICRO DEVICES INC·Filed 2001·Granted Feb 4, 2003·21 cites·32 claims
- 0776US6268255B1Method of forming a semiconductor device with metal silicide regionsADVANCED MICRO DEVICES INC·Filed 2000·Granted Jul 31, 2001·22 cites·56 claims
- 0866US6881665B1Depth of focus (DOF) for trench-first-via-last (TFVL) damascene processing with hard mask and low viscosity photoresistADVANCED MICRO DEVICES INC·Filed 2000·Granted Apr 19, 2005·13 cites·20 claims
- 0960US7737021B1Resist trim process to define small openings in dielectric layersGLOBALFOUNDRIES INC·Filed 2002·Granted Jun 15, 2010·6 cites·26 claims
- 1055US6406993B1Method of defining small openings in dielectric layersADVANCED MICRO DEVICES INC·Filed 2000·Granted Jun 18, 2002·7 cites·28 claims
- 1151US6313538B1Semiconductor device with partial passivation layerADVANCED MICRO DEVICES INC·Filed 2000·Granted Nov 6, 2001·4 cites·9 claims
- 1248US7005380B2Simultaneous formation of device and backside contacts on wafers having a buried insulator layerADVANCED MICRO DEVICES INC·Filed 2003·Granted Feb 28, 2006·3 cites·29 claims
- 1336US2003232466A1Diffusion barrier layer in semiconductor substrates to reduce copper contamination from the back sideFiled 2002·Application pending·0 cites
- 1432US8698312B2Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packagingWERKING JAMES·Filed 2005·Granted Apr 15, 2014·0 cites·19 claims
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