Inventor
EDELSTEIN DANIEL C
US271 patents
⚠️ This page may combine multiple inventors who share the name “EDELSTEIN DANIEL C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
45 patentsUS9941241B2Apr 10, 2018
Method for wafer-wafer bonding
IBM219 citations99
US9496239B1Nov 15, 2016
Nitride-enriched oxide-to-oxide 3D wafer bonding
IBM243 citations99
US9064874B2Jun 23, 2015
Interconnect with titanium—oxide diffusion barrier
IBM173 citations99
US7084079B2Aug 1, 2006
Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications
IBM610 citations99
US6531412B2Mar 11, 2003
Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications
IBM554 citations99
US6358832B1Mar 19, 2002
Method of forming barrier layers for damascene interconnects
IBM119 citations99
US6234870B1May 22, 2001
Serial intelligent electro-chemical-mechanical wafer processor
IBM192 citations99
US6153935ANov 28, 2000
Dual etch stop/diffusion barrier for damascene interconnects
IBM376 citations99
US9324650B2Apr 26, 2016
Interconnect structures with fully aligned vias
IBM79 citations98
US6375693B1Apr 23, 2002
Chemical-mechanical planarization of barriers or liners for copper metallurgy
IBM98 citations98
US6335104B1Jan 1, 2002
Method for preparing a conductive pad for electrical connection and conductive pad formed
IBM155 citations98
US5559367ASep 24, 1996
Diamond-like carbon for use in VLSI and ULSI interconnect systems
IBM178 citations98
US6649531B2Nov 18, 2003
Process for forming a damascene structure
IBM87 citations97
US6153043ANov 28, 2000
Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing
IBM122 citations97
US7405147B2Jul 29, 2008
Device and methodology for reducing effective dielectric constant in semiconductor devices
IBM35 citations96
US7033927B2Apr 25, 2006
Apparatus and method for thermal isolation, circuit cooling and electromagnetic shielding of a wafer
IBM76 citations96
US6570256B2May 27, 2003
Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
IBM85 citations96
US6498385B1Dec 24, 2002
Post-fuse blow corrosion prevention structure for copper fuses
IBM68 citations96
US6457234B1Oct 1, 2002
Process for manufacturing self-aligned corrosion stop for copper C4 and wirebond
IBM53 citations96
US6251528B1Jun 26, 2001
Method to plate C4 to copper stud
IBM62 citations96
US6106687AAug 22, 2000
Process and diffusion baffle to modulate the cross sectional distribution of flow rate and deposition rate
IBM84 citations96
US7030031B2Apr 18, 2006
Method for forming damascene structure utilizing planarizing material coupled with diffusion barrier material
IBM69 citations95
US6252295B1Jun 26, 2001
Adhesion of silicon carbide films
IBM67 citations95
US9859215B1Jan 2, 2018
Formation of advanced interconnects
IBM17 citations94
US9190321B2Nov 17, 2015
Self-forming embedded diffusion barriers
IBM28 citations94
US9064937B2Jun 23, 2015
Substrate bonding with diffusion barrier structures
IBM29 citations94
US6632377B1Oct 14, 2003
Chemical-mechanical planarization of metallurgy
IBM70 citations94
US10325806B2Jun 18, 2019
Copper interconnect structure with manganese oxide barrier layer
IBM9 citations93
US10224241B2Mar 5, 2019
Copper interconnect structure with manganese oxide barrier layer
IBM9 citations93
US9947579B2Apr 17, 2018
Copper interconnect structure with manganese oxide barrier layer
IBM15 citations93
US9947581B2Apr 17, 2018
Method of forming a copper based interconnect structure
IBM10 citations93
US9716063B1Jul 25, 2017
Cobalt top layer advanced metallization for interconnects
IBM13 citations93
US9601371B2Mar 21, 2017
Interconnect structure with barrier layer
IBM16 citations93
US9455182B2Sep 27, 2016
Interconnect structure with capping layer and barrier layer
IBM18 citations93
US7956463B2Jun 7, 2011
Large grain size conductive structure for narrow interconnect openings
IBM24 citations93
US7892940B2Feb 22, 2011
Device and methodology for reducing effective dielectric constant in semiconductor devices
IBM11 citations93
US7662722B2Feb 16, 2010
Air gap under on-chip passive device
IBM31 citations93
US7572682B2Aug 11, 2009
Semiconductor structure for fuse and anti-fuse applications
IBM27 citations93
US7517736B2Apr 14, 2009
Structure and method of chemically formed anchored metallic vias
IBM34 citations93
US7361993B2Apr 22, 2008
Terminal pad structures and methods of fabricating same
IBM21 citations93
US7015581B2Mar 21, 2006
Low-K dielectric material system for IC application
IBM22 citations93
US6992390B2Jan 31, 2006
Liner with improved electromigration redundancy for damascene interconnects
IBM30 citations93
US6878616B1Apr 12, 2005
Low-k dielectric material system for IC application
IBM16 citations93
US6746947B2Jun 8, 2004
Post-fuse blow corrosion prevention structure for copper fuses
IBM20 citations93
US6730984B1May 4, 2004
Increasing an electrical resistance of a resistor by oxidation or nitridization
IBM13 citations93
EDELSTEIN DANIEL C
2 patentsGLOBALFOUNDRIES INC
1 patentCORNELL RES FOUNDATION INC
1 patentYANG CHIH-CHAO
1 patentShowing the top 50 of 271 patents by PatentIndex Score.