Inventor
LEE PETER
US174 patents
⚠️ This page may combine multiple inventors who share the name “LEE PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MARVELL INT LTD
7 patentsUS7609538B1Oct 27, 2009
Logic process DRAM
MARVELL INT LTD26 citations93
US7184290B1Feb 27, 2007
Logic process DRAM
MARVELL INT LTD16 citations93
US6570781B1May 27, 2003
Logic process DRAM
MARVELL INT LTD24 citations93
US8030128B1Oct 4, 2011
Method to form high density phase change memory (PCM) top contact every two bits
MARVELL INT LTD21 citations92
US8947909B1Feb 3, 2015
System and method for creating a bipolar resistive RAM (RRAM)
MARVELL INT LTD7 citations84
US7939445B1May 10, 2011
High density via and metal interconnect structures, and methods of forming the same
MARVELL INT LTD17 citations84
US7745809B1Jun 29, 2010
Ultra high density phase change memory having improved emitter contacts, improved GST cell reliability and highly matched UHD GST cells using column mirco-trench strips
MARVELL INT LTD9 citations84
LEE PETER
4 patentsUS8478722B2Jul 2, 2013
Enterprise level business information networking for changes in a database
LEE PETER36 citations97
USD291991SSep 22, 1987
Handset telephone
LEE PETER63 citations96
USD291562SAug 25, 1987
Telephone
LEE PETER27 citations93
US8738620B2May 27, 2014
Implementing enterprise level business information networking
LEE PETER10 citations84
DATASYNAPSE INC
3 patentsUS7093004B2Aug 15, 2006
Using execution statistics to select tasks for redundant assignment in a distributed computing platform
DATASYNAPSE INC166 citations98
US7130891B2Oct 31, 2006
Score-based scheduling of service requests in a grid services computing platform
DATASYNAPSE INC108 citations96
US6757730B1Jun 29, 2004
Method, apparatus and articles-of-manufacture for network-based distributed computing
DATASYNAPSE INC96 citations96
Stored IQ
3 patentsHIP SHING FAT CO LTD
3 patentsAPLUS FLASH TECHNOLOGY INC
2 patentsUS7164608B2Jan 16, 2007
NVRAM memory cell architecture that integrates conventional SRAM and flash cells
APLUS FLASH TECHNOLOGY INC375 citations99
US7855912B2Dec 21, 2010
Circuit and method for multiple-level programming, reading, and erasing dual-sided nonvolatile memory cell
APLUS FLASH TECHNOLOGY INC8 citations84
LENOVO SINGAPORE PTE LTD
2 patents(unassigned)
2 patentsAPPLIED MATERIALS INC
2 patentsHEWLETT PACKARD DEVELOPMENT CO
2 patentsMARVELL WORLD TRADE LTD
2 patentsUS9142284B2Sep 22, 2015
Concurrent use of SRAM cells with both NMOS and PMOS pass gates in a memory system
MARVELL WORLD TRADE LTD8 citations84
US8934285B2Jan 13, 2015
Method and apparatus for forming a contact in a cell of a resistive random access memory to reduce a voltage required to program the cell
MARVELL WORLD TRADE LTD6 citations84
VIRTUAL INK CORP
1 patentIBM
1 patentCHEUNG GEORGE
1 patentCOMPAQ COMPUTER CORP
1 patentSALESFORCE COM INC
1 patentGRADIN WILLIAM
1 patentNTT DOCOMO INC
1 patentMATSUSHITA ELECTRIC INDUSTRIAL CO LTD
1 patentAMERI PHONE INC
1 patentAMERICAN PHONE PRODUCTS INC
1 patentSTERNSON SCOTT
1 patentBERNARDIN JAMES
1 patentTINKER JEFFREY L
1 patentINDICIUM MEDIA LLC
1 patentHEWLETT PACKARD DEVELOPMENT CO LP
1 patentWU ALBERT
1 patentLEE WINSTON
1 patentUCHICAGO ARGONNE LLC
1 patentShowing the top 50 of 174 patents by PatentIndex Score.