Ultra high density phase change memory having improved emitter contacts, improved GST cell reliability and highly matched UHD GST cells using column mirco-trench strips

Abstract

Embodiments of the present invention provide an apparatus comprising a substrate comprising an emitter layer and at least one emitter interface adjacent to the emitter layer, and a metal protective layer on a top surface of the at least one emitter interface. A method of manufacturing such an apparatus is also disclosed. The method may include performing plasma nitridation directed at column micro-trench strips. Other embodiments are also described.

1. A method comprising:
 forming a substrate, the substrate comprising an emitter layer and at least one emitter interface adjacent to the emitter layer; 
 performing a metallization such that an emitter interface metal protective layer is provided on the at least one emitter interface; 
 forming, within a dielectric layer, a heater element on the emitter interface metal protective layer of the at least one emitter interface; 
 forming a heater element contact on the heater element by depositing an oxide layer on the dielectric layer and performing a lithograph/etch process to create column micro-trench strips within the oxide layer; and 
 performing plasma nitridation directed at the column micro-trench strips. 
 
   
   
     2. The method of  claim 1 , wherein the substrate further comprises a base layer and at least one base interface adjacent to the base layer, and wherein the metallization is performed such that at least one base interface includes a base interface metal protective layer thereon. 
   
   
     3. The method of  claim 2 , wherein the substrate further comprises a peripheral device layer and at least one peripheral device interface adjacent to the peripheral device layer, and wherein the metallization is performed such that at least one peripheral device interface includes a peripheral device interface metal protective layer thereon. 
   
   
     4. The method of  claim 1 , wherein the metallization is performed with tungsten. 
   
   
     5. The method of  claim 1 , further comprising performing silicidation prior to performing the metallization to form the at least one emitter interface. 
   
   
     6. The method of  claim 1 , wherein the heater element comprises one of TiN or TaN. 
   
   
     7. The method of  claim 1 , further comprising depositing GST material on the oxide layer, depositing a top electrode material on the GST material and performing a lithograph/etch process to create GST columns. 
   
   
     8. The method of  claim 7 , further comprising forming, for each at least one emitter interface, a top emitter interface on the GST columns. 
   
   
     9. The method of  claim 8 , further comprising performing a second metallization such that a top emitter interface metal protective layer is provided on the at least one top emitter interface. 
   
   
     10. The method of  claim 9 , wherein the second metallization is performed with tungsten. 
   
   
     11. An apparatus comprising:
 a substrate comprising an emitter layer and at least one emitter interface adjacent to the emitter layer; 
 an emitter interface metal protective layer on the at least one emitter interface; 
 a heater element on the emitter interface metal protective layer of the at least one emitter interface; and 
 a heater element contact on the heater element, 
 wherein the heater element contact is formed by depositing an oxide layer on a dielectric layer and performing a lithograph/etch process to create column micro-trench strips within the oxide layer, and 
 wherein a plasma nitridation is directed at the column micro-trench strips such that the column micro-trench strips are defined by walls comprising nitrided oxide. 
 
   
   
     12. The apparatus of  claim 11 , wherein the substrate further comprises a base layer and at least one base interface adjacent to the base layer, and wherein at least one base interface includes a base interface metal protective layer thereon. 
   
   
     13. The apparatus of  claim 12 , wherein the substrate further comprises a peripheral device layer and at least one peripheral device interface adjacent to the peripheral device layer, and wherein the peripheral device interface includes a peripheral device interface metal protective layer thereon. 
   
   
     14. The apparatus of  claim 11 , wherein the emitter interface metal protective layer comprises tungsten. 
   
   
     15. The apparatus of  claim 11 , wherein the heater element comprises one of TiN or TaN. 
   
   
     16. The apparatus of  claim 11 , further comprising GST columns within the column micro-trench strips. 
   
   
     17. The apparatus of  claim 16 , further comprising a top emitter interface on the GST columns for the at least one emitter. 
   
   
     18. The apparatus of  claim 17 , further comprising a top metal protective layer on the at least one top emitter interface. 
   
   
     19. The apparatus of  claim 18 , wherein the top metal protective layer comprises tungsten.