Inventor

REHMEYER JAMES S

US95 patents

⚠️ This page may combine multiple inventors who share the name “REHMEYER JAMES S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REHMEYER JAMES S

MICRON TECHNOLOGY INC

Methods for independent memory bank maintenance and memory devices and systems employing the same

Apparatuses and methods for staggered timing of targeted refresh operations

Apparatuses and methods for staggered timing of targeted refresh operations

Apparatuses and methods for staggered timing of skipped refresh operations

Apparatuses and methods for staggered timing of targeted refresh operations

Apparatuses and methods for staggered timing of skipped refresh operations

Apparatuses and methods for detecting illegal commands and command sequences

Apparatuses and methods for staggered timing of targeted refresh operations

Memory with per die temperature-compensated refresh control

Apparatuses and methods for on-memory pattern matching

Non-volatile memory devices and systems with volatile memory features and methods for operating the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Memory with on-die data transfer

Memory with partial array refresh

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for detecting and mitigating memory media degradation and memory devices employing the same

Non-volatile memory devices and systems with read-only memory features and methods for operating the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Methods for independent memory bank maintenance and memory devices and systems employing the same

Memory device with a row repair mechanism and methods for operating the same

Non-volatile memory devices and systems with volatile memory features and methods for operating the same

Voltage adjustment based on pending refresh operations

Non-volatile memory devices and systems with volatile memory features and methods for operating the same

Systems and methods for improving power efficiency in refreshing memory banks

Determination of durations of memory device temperatures

Apparatus with refresh management mechanism

Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems

Memory devices with redundant memory cells for replacing defective memory cells, and related systems and methods

Phase charge sharing

Memory with partial bank refresh

Methods for detecting and mitigating memory media degradation and memory devices employing the same

Memory with non-volatile configurations for efficient power management and operation of the same

Methods for detecting and mitigating memory media degradation and memory devices employing the same

Data movement operations in non-volatile memory

Transistor antifuse, and related devices, systems, and methods

Memory device with a memory repair mechanism and methods for operating the same

Selectable fuse sets, and related methods, devices, and systems

Memory device with a memory repair mechanism and methods for operating the same

Adjustable column address scramble using fuses

Delay of self-refreshing at memory die

Antifuse device having interconnect jumper

Management of heat on a semiconductor device and methods for producing the same

Shared components in fuse match logic

LODESTAR LICENSING GROUP LLC

Apparatus with refresh management mechanism

Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems

Methods for independent memory bank maintenance and memory devices and systems employing the same

Apparatus with refresh management mechanism