Inventor

KURE TOKUO

JP61 patents

⚠️ This page may combine multiple inventors who share the name “KURE TOKUO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KURE TOKUO

HITACHI LTD

Scanning electron microscope and method for production of semiconductor device by using the same

Dynamic random access memory having trench capacitors and vertical transistors

Dry etching by alternately etching and depositing

Surface analysis method and apparatus for carrying out the same

Manufacturing method of non-volatile semiconductor memory device

Scanning electron microscope and method for dimension measuring by using the same

Scanning electron microscope and method for dimension measuring by using the same

Scanning electron microscope and method for dimension measuring by using the same

Scanning electron microscope and method for dimension measuring by using the same

Semiconductor memory device with recessed array region

Semiconductor memory device having stacked capacitor cells

Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover

Semiconductor memory device having stacked capacitor cells

Semiconductor memory and method of producing the same

Method of making a semiconductor memory device with recessed array region

Dram with FET stacked over capacitor

Tapered groove IC isolation

Semiconductor memory having writing and reading transistors, method of fabrication thereof, and method of use thereof

Etching method and etching apparatus therefor

Method of manufacturing a semiconductor device

Semiconductor memory with trench capacitor

Semiconductor memory

Method of forming groove isolation in a semiconductor device

Method and apparatus for treating surface of semiconductor

Specimen surface processing method

Method for processing surface of sample

Method and apparatus for X-ray analyses

Method and apparatus for x-ray analyses

Semiconductor memory device having static random access memory

Transistor with overlapping gate/drain and two-layered gate structures

Semiconductor memory device with recessed array region

Method for fabricating semiconductor memory with a groove

Semiconductor device having a low-resistivity planar wiring structure

Semiconductor device with buried side contact

Semiconductor memory device

Semiconductor memory device having stacked capacitors

Method of fabricating stacked capacitor cell memory devices

Semiconductor memory

Semiconductor memory

Semiconductor device and method of manufacturing the same

Method of manufacturing a bipolar transistor

Semiconductor memory and method for fabricating the same

Semiconductor memory and method of producing the same

Vertical MOSFET DRAM

Method for formation of insulation film on silicon buried in trench

Semiconductor memory using trench capacitor

Semiconductor device

Method and apparatus for treating surface of semiconductor

SHOWA DENKO KK

Gas for selectively etching silicon nitride and process for selectively etching silicon nitride with the gas

RENESAS TECH CORP

Semiconductor integrated circuit device and process for producing the same