Tapered groove IC isolation

Abstract

A semiconductor device and the method of manufacturing the same are disclosed, the semiconductor device having a plurality of elements isolated by a groove having a gentle slope at the upper side wall, and a steep slope at the lower side wall. This groove provides low steps on its mouth and occupies a small area on the substrate, thus enabling an extremely high-density integrated circuit to be formed.

What is claimed: 
     
       1. A semiconductor integrated circuit device having a plurality of elements formed in a surface region of a semiconductor substrate to be isolated from each other by a groove formed on said substrate, said groove having a gentle slope at its upper side wall to provide a gentle slope at the surface region of the substrate and a steep slope at its lower side wall, and the inside of said groove being filled with an insulating material, wherein the upper and lower slopes of said groove are at about 30° to 65° and 70° to 90°, respectively with respect to the main surface of said semiconductor substrate. 
     
     
       2. A semiconductor device according to claim 1, wherein said insulating material is filled in the groove the inside wall of which is deposited in advance thereon with an insulating film. 
     
     
       3. A semiconductor device according to claim 2 or 1, wherein said insulating material is selected from a group of SiO 2 , Si 3  N 4 , Al 2  O 3  or phosphosilicate glass. 
     
     
       4. A semiconductor integrated circuit device having a plurality of elements formed on a surface region of a semiconductor substrate to be isolated from each other by a groove formed on said substrate, said groove having a gentle slope at its upper side wall to provide a gentle slope at the surface region of the substrate and a steep slope at its lower side wall, said groove being filled with a polycrystalline silicon through an insulating film deposited on the inner surface of said groove, wherein the upper and lower side walls of said groove are at an angle in the range of about 30° to 65°, and at an angle in the range of about 70° to 90°, respectively with respect to the main surface of said semiconductor substrate. 
     
     
       5. A semiconductor device according to claim 4, wherein said insulating film includes a single layer. 
     
     
       6. A semiconductor device according to claim 4, wherein said insulating film includes two layers. 
     
     
       7. A semiconductor device according to claim 6, wherein said two layers are made of SiO 2  and Si 3  N 4  respectively. 
     
     
       8. A semiconductor device according to claim 4, wherein said insulating film is deposited on the side wall and bottom of said groove. 
     
     
       9. A semiconductor device according to claim 4, wherein said insulating film is deposited only on the side wall of said groove. 
     
     
       10. A semiconductor device according to claim 1, wherein said groove is provided between said elements. 
     
     
       11. A semiconductor device according to claim 1, wherein the gentle and steep slopes of said groove are directly contiguous to each other without an intermediate portion therebetween parallel to a surface of said semiconductor substrate. 
     
     
       12. A semiconductor device having a pluraliy of elements formed in a surface region of a semiconductor substrate to be isolated from each other by a groove formed on said substrate, said groove having a gentle slope at its upper side wall and a steep slope at its lower side wall, and the inside of said groove being filled with an insulating material, wherein the upper and lower slopes of said groove are at about 30° to 65° and 70° to 90°, respectively with respect to the main surface of said semiconductor substrate. 
     
     
       13. A semiconductor device having a plurality of elements formed on a surface region of a semiconductor substrate to be isolated from each other by a groove formed on said substrate, said groove having a gentle slope at its upper side wall and a steep slope at its lower side wall, said groove being filled with a polycrystalline silicon through an insulating film deposited on the inner surface of said groove, wherein the upper and lower side walls of said groove are at an angle in the range of about 30° to 65°, and at an angle in the range of about 70° to 90°, respectively with respect to the main surface of said semiconductor substrate. 
     
     
       14. A semiconductor device according to claim 12, wherein said insulating material is filled in the groove, the inside wall of which is deposited in advance thereon with an insulating film. 
     
     
       15. A semiconductor device according to claim 12, wherein said insulating material is selected from a group of SiO 2 , Si 3  N 4 , Al 2  O 3  or phosphosilicate glass. 
     
     
       16. A semiconductor device according to claim 14, wherein said insulating material is selected from a group of SiO 2 , Si 3  N 4 , Al 2  O 3  or phosphosilicate glass. 
     
     
       17. A semiconductor device according to claim 13, wherein said insulating film includes a single layer. 
     
     
       18. A semiconductor device according to claim 13, wherein said insulating film includes two layers. 
     
     
       19. A semiconductor device according to claim 18, wherein said two layers are made of SiO 2  and Si 3  N 4 , respectively. 
     
     
       20. A semiconductor device according to claim 13, wherein said insulating film is deposited on the side wall and bottom of said groove. 
     
     
       21. A semiconductor device according to claim 13, wherein said insulating film is deposited only on the side wall of said groove. 
     
     
       22. A semiconductor device according to claim 1, wherein the maximum width of said groove is less than the depth of said groove. 
     
     
       23. A semiconductor device according to claim 4, wherein the maximum width of said groove is less than the depth of said groove.