Inventor

CHOE JEONG-DONG

KR43 patents

⚠️ This page may combine multiple inventors who share the name “CHOE JEONG-DONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOE JEONG-DONG

SAMSUNG ELECTRONICS CO LTD

Methods of fabricating multichannel metal oxide semiconductor (MOS) transistors

Methods of fabricating fin field transistors

Field effect transistors having multiple stacked channels

Methods of fabricating field effect transistors having multiple stacked channels

Semiconductor devices with enlarged recessed gate electrodes

Semiconductor devices having a field effect transistor and methods of fabricating the same

Methods of fabricating field effect transistors having multiple stacked channels

Methods of forming metal oxide semiconductor (MOS) transistors having three dimensional channels

Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions

Self-aligned semiconductor contact structures and methods for fabricating the same

Field effect transistors having multiple stacked channels

Double gate MOS transistors

Semiconductor devices having a field effect transistor and methods of fabricating the same

Metal oxide semiconductor (MOS) transistors having three dimensional channels

Self-aligned semiconductor contact structures

Methods of fabricating semiconductor-on-insulator (SOI) substrates and semiconductor devices using sacrificial layers and void spaces

Integrated circuit structures including epitaxial silicon layers that extend from an active region through an insulation layer to a substrate

Semiconductor device employing buried insulating layer and method of fabricating the same

MOS transistors having inverted T-shaped gate electrodes

Methods of forming integrated circuits structures including epitaxial silicon layers in active regions

Metal oxide semiconductor field effect transistors (MOSFETs) including recessed channel regions and methods of fabricating the same

Semiconductor device employing buried insulating layer and method of fabricating the same

Semiconductor devices with enlarged recessed gate electrodes

Metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions

Semiconductor device having partially insulated field effect transistor (PiFET) and method of fabricating the same

Method of manufacturing a transistor

Methods of forming field effect transistors including raised source/drain regions

Non-volatile memory device and method of manufacturing the same

Nonvolatile semiconductor device including a floating gate, method of manufacturing the same and associated systems

Semiconductor device

Methods of fabricating semiconductor devices with enlarged recessed gate electrodes

MOS Transistors having inverted T-shaped gate electrodes and fabrication methods thereof

Semiconductor device having two different operation modes employing an asymmetrical buried insulating layer and method for fabricating the same

Semiconductor device having shared bit line structure

LEE SE-HOON

Semiconductor device including driving transistors

Nonvolatile semiconductor device including a floating gate and associated systems

YOON YOUNG-BAE

Method of manufacturing a semiconductor device

Non-volatile memory devices including shared bit lines and methods of fabricating the same

OH CHANG-WOO

Vertical channel fin field-effect transistors having increased source/drain contact area and methods for fabricating the same

HYUNDAI ELECTRONICS IND

Method of forming a contact in semiconductor device

TOKASHIKI KEN

Synchronous pulse plasma etching equipment and method of fabricating a semiconductor device

JANG DONG-HOON

Method of manufacturing semiconductor device having shared bit line structure

LEE HAK-SUN

Methods of manufacturing charge trap-type non-volatile memory devices