Inventor

KOTHANDARAMAN MAKESHWAR

US44 patents

⚠️ This page may combine multiple inventors who share the name “KOTHANDARAMAN MAKESHWAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KOTHANDARAMAN MAKESHWAR

AGERE SYSTEMS INC

Differential buffer circuit with reduced output common mode variation

Self-bypassing voltage level translator circuit

Voltage translator circuit for a mixed voltage circuit

Buffer circuit with enhanced overvoltage protection

Buffer circuit with multiple voltage range

Floating well circuit having enhanced latch-up performance

Enhanced output impedance compensation

Buffer circuit having multiplexed voltage level translation

Voltage level translator circuit with wide supply voltage range

Voltage level translator circuit

Semiconductor resistance compensation with enhanced efficiency

Moderate current 5V tolerant buffer using a 2.5 volt power supply

Method and apparatus for improving reliability of an integrated circuit having multiple power domains

Circuit having enhanced input signal range

High current 5V tolerant buffer using a 2.5 volt power supply

Reference compensation circuit

Circuit for selectively bypassing a capacitive element

Multiple-mode compensated buffer circuit

Comparator circuit having reduced pulse width distortion

LUCENT TECHNOLOGIES INC

Amplifier having improved common mode voltage range

Integrated circuit having controlled impedance

CMOS input buffer protection circuit

Precision current source

CMOS high voltage drive output buffer

CMOS reference voltage generator

CMOS output buffer protection circuit

KUMAR PANKAJ

Jitter reduction in high speed low core voltage level shifter

Voltage level translator circuit for reducing jitter

AC noise suppression from a bias signal in high voltage supply/low voltage device

Interfacing between differing voltage level requirements in an integrated circuit system

Low power receiver for implementing a high voltage interface implemented with low voltage devices

Bias voltage generation to protect input/output (IO) circuits during a failsafe operation and a tolerant operation

LSI CORP

I/O buffer with low voltage semiconductor devices

High-voltage tolerant biasing arrangement using low-voltage devices

Failsafe and tolerant driver architecture and method

Bias circuit scheme for improved reliability in high voltage supply with low voltage device

Floating well circuit operable in a failsafe condition and a tolerant condition

BHATTACHARYA DIPANKAR

Voltage level translator circuit

Impedance compensation in a buffer circuit

Electrostatic discharge protection circuit

Hybrid impedance compensation in a buffer circuit

KOTHANDARAMAN MAKESHWAR

Current-mode logic buffer with enhanced output swing

Impedance mismatch detection circuit

CHLIPALA JAMES D

Input/output buffer information specification (IBIS) model generation for multi-chip modules (MCM) and similar devices