Inventor
TSAO JENN
TW15 patents
⚠️ This page may combine multiple inventors who share the name “TSAO JENN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
7 patentsUS5817562AOct 6, 1998
Method for making improved polysilicon FET gate electrode structures and sidewall spacers for more reliable self-aligned contacts (SAC)
TAIWAN SEMICONDUCTOR MFG147 citations97
US5766992AJun 16, 1998
Process for integrating a MOSFET device, using silicon nitride spacers and a self-aligned contact structure, with a capacitor structure
TAIWAN SEMICONDUCTOR MFG60 citations95
US6124609ASep 26, 2000
Split gate flash memory with buried source to shrink cell dimension and increase coupling ratio
TAIWAN SEMICONDUCTOR MFG22 citations92
US6017795AJan 25, 2000
Method of fabricating buried source to shrink cell dimension and increase coupling ratio in split-gate flash
TAIWAN SEMICONDUCTOR MFG37 citations92
US5731236AMar 24, 1998
Process to integrate a self-aligned contact structure, with a capacitor structure
TAIWAN SEMICONDUCTOR MFG49 citations92
US6207515B1Mar 27, 2001
Method of fabricating buried source to shrink chip size in memory array
TAIWAN SEMICONDUCTOR MFG12 citations74
US6396112B2May 28, 2002
Method of fabricating buried source to shrink chip size in memory array
TAIWAN SEMICONDUCTOR MFG0 citations52
UNITED MICROELECTRONICS CORP
4 patentsUS6083783AJul 4, 2000
Method of manufacturing complementary metallic-oxide-semiconductor
UNITED MICROELECTRONICS CORP24 citations92
US6136713AOct 24, 2000
Method for forming a shallow trench isolation structure
UNITED MICROELECTRONICS CORP17 citations84
US6133083AOct 17, 2000
Method to fabricate embedded DRAM
UNITED MICROELECTRONICS CORP9 citations74
US6291111B1Sep 18, 2001
Method of trench polishing
UNITED MICROELECTRONICS CORP2 citations63