Inventor

KWAK JONG-TAE

KR29 patents

⚠️ This page may combine multiple inventors who share the name “KWAK JONG-TAE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KWAK JONG-TAE

HYNIX SEMICONDUCTOR INC

Digital delay locked loop capable of correcting duty cycle and its method

Clock synchronization circuit

Digital DLL apparatus for correcting duty cycle and method thereof

Low power type Rambus DRAM

Clock synchronization circuit having improved jitter property

Register controlled delay locked loop and its control method

Delay locked loop device

Digital delay locked loop capable of correcting duty cycle and its method

Register controlled delay locked loop having an acceleration mode

Delay locked loop in semiconductor memory device

Delay locked loop and its control method for correcting a duty ratio of a clock signal

Digital DLL apparatus for correcting duty cycle and method thereof

Delay locked loop and its control method

Delayed locked loops and methods of driving the same

Delay locked loop and method of driving the same

Method and apparatus for outputting burst read data

Delay locked loop in semiconductor memory device

Delay locked loop and clock generation method thereof

Control circuit for stable exit from power-down mode

Delay locked loop device

Controlling output current rambus DRAM

Refresh control circuit and method for multi-bank structure DRAM

Refresh control circuit and method for multi-bank structure DRAM

Control circuit for stable exit from power-down mode

Semiconductor memory device for reducing chip area

HYUNDAI ELECTRONICS IND

Clock control circuit for Rambus DRAM

Rambus DRAM with clock control circuitry that reduces power consumption

Load signal generating circuit of a packet command driving type memory device

KWAK JONG-TAE

Register controlled delay locked loop and its control method