Inventor
JACUNSKI MARK D
US17 patents
⚠️ This page may combine multiple inventors who share the name “JACUNSKI MARK D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
11 patentsUS6399990B1Jun 4, 2002
Isolated well ESD device
IBM132 citations96
US6400202B1Jun 4, 2002
Programmable delay element and synchronous DRAM using the same
IBM48 citations95
US6348827B1Feb 19, 2002
Programmable delay element and synchronous DRAM using the same
IBM24 citations91
US9093175B2Jul 28, 2015
Signal margin centering for single-ended eDRAM sense amplifier
IBM19 citations84
US6580650B2Jun 17, 2003
DRAM word line voltage control to insure full cell writeback level
IBM10 citations74
US9779783B2Oct 3, 2017
Latching current sensing amplifier for memory array
IBM3 citations73
US7194670B2Mar 20, 2007
Command multiplier for built-in-self-test
IBM9 citations73
US6580655B2Jun 17, 2003
Pre-charge circuit and method for memory devices with shared sense amplifiers
IBM12 citations71
US7221601B2May 22, 2007
Timer lockout circuit for synchronous applications
IBM5 citations60
US7068564B2Jun 27, 2006
Timer lockout circuit for synchronous applications
IBM2 citations60
US7085180B2Aug 1, 2006
Method and structure for enabling a redundancy allocation during a multi-bank operation
IBM0 citations42
GLOBALFOUNDRIES INC
3 patentsUS10429434B2Oct 1, 2019
On-chip reliability monitor and method
GLOBALFOUNDRIES INC6 citations83
US10020047B2Jul 10, 2018
Static random access memory (SRAM) write assist circuit with improved boost
GLOBALFOUNDRIES INC2 citations73
US10535379B2Jan 14, 2020
Latching current sensing amplifier for memory array
GLOBALFOUNDRIES INC0 citations52