Inventor

COLINGE JEAN-PIERRE

TW158 patents

⚠️ This page may combine multiple inventors who share the name “COLINGE JEAN-PIERRE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

COLINGE JEAN-PIERRE

TAIWAN SEMICONDUCTOR MFG CO LTD

Non-volatile memory device having nanocrystal floating gate and method of fabricating same

Aligned gate-all-around structure

Metal gate of gate-all-around transistor

Semiconductor devices and methods of manufacture thereof

Method of fabricating epitaxial gate dielectrics and semiconductor device of the same

Silicon and silicon germanium nanowire formation

Self-aligned wrapped-around structure

Semiconductor device and channel structure thereof

Silicon and silicon germanium nanowire formation

Contacts for highly scaled transistors

Silicon and silicon germanium nanowire formation

Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure

3D cross-bar nonvolatile memory

Contacts for highly scaled transistors

Contacts for highly scaled transistors

Silicon and silicon germanium nanowire formation

Contacts for highly scaled transistors

3D cross-bar nonvolatile memory

Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure

Semiconductor devices and methods of manufacture thereof

2-D material transistor with vertical structure

Method for reducing contact resistance in semiconductor structures

Semiconductor device and manufacturing method thereof

Semiconductor devices and methods of manufacture thereof

Semiconductor arrangement with one or more semiconductor columns

Vertical nanowire transistor for input/output structure

Semiconductor device structure and method for forming the same

Memory device and method for fabricating the same

Stacked device and associated layout structure

Semiconductor device and manufacturing method thereof

Gate structure and method for fabricating the same

Devices having a semiconductor material that is semimetal in bulk and methods of forming the same

Semiconductor structures and methods for multi-level work function

Method of forming a FinFET having an oxide region in the source/drain region

Inducing localized strain in vertical nanowire transistors

TAIWAN SEMICONDUCTOR MFG

Self-aligned wrapped-around structure

Apparatus and method for forming semiconductor contacts

Method of fabricating a silicon-on-insulator semiconductor device with an implanted ground plane

Quasi-surrounding gate and a method of fabricating a silicon-on-insulator semiconductor device with the same

Silicon and silicon germanium nanowire formation

Fin structure of semiconductor device

Method of fabricating a gate all around device

Variable channel strain of nanowire transistors to improve drive current

Tuning strain in semiconductor devices

Methods for manufacturing a fin structure of semiconductor device

FinFET with dual workfunction gate structure

Method for fabricating a gate all around device

COLINGE JEAN-PIERRE

Junctionless metal-oxide-semiconductor transistor

HAOND MICHEL

Process for the production of mutually electrically insulated monocrystalline silicon islands using laser recrystallization

HEWLETT PACKARD CO

Method for making patterned implanted buried oxide transistors and structures