Inventor

WANG HAOBO

US48 patents

⚠️ This page may combine multiple inventors who share the name “WANG HAOBO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WANG HAOBO

SK HYNIX INC

Performance of a bit flipping (BF) decoder of an error correction system

Error mitigation scheme for bit-flipping decoders for irregular low-density parity-check codes

Fast-converging bit-flipping decoder for low-density parity-check codes

Bit-flipping decoder and decoding method for irregular codes

On-the-fly scaling factor change for irregular LDPC codes

Exact ber reporting in the presence of CRC termination

Compressing deep neural networks used in memory devices

Oscillation detection and mitigation in bit-flipping decoders

Deep learning based program-verify modeling and voltage estimation for memory devices

Efficient read-threshold calculation method for parametric PV-level modeling

Read threshold optimization systems and methods using model-less regression

Gaussian modeling for soft-read threshold estimation in non-volatile memory devices

Bit-flipping decoder architecture for irregular quasi-cyclic low-density parity-check codes

Dynamic control of quasi-cyclic low-density parity-check bit-flipping decoder

Encoder for memory system and method thereof

Address embedding for encoder and decoder and data processing method thereof

Tracking read voltages in memory devices using deep neural networks

Method and system for fast column processing for highly irregular LDPC codes

System and method for history-based non-parametric channel information prediciton using a deep neural network

Min-sum decoder for row-irregular low density parity check codes

Data interleaver for burst error correction

Hybrid precision MS decoder to reduce gate-count for long codes

Read threshold estimation systems and methods using deep learning

System and method for non-parametric optimal read threshold estimation using deep neural network

Descrambler for memory systems and method thereof

Read threshold optimization systems and methods by multi-dimensional search

Memory system with low-latency read recovery and method of operating the memory system

Fast-converging soft bit-flipping decoder for low-density parity-check codes

Log likelihood ratios adjustment based on error tracker

Memory system with single decoder, multiple memory sets and method for decoding multiple codewords from memory sets using the single decoder

Read threshold prediction in memory devices using deep neural networks

In-memory garbage collection

Out-of-order bit-flipping decoders for non-volatile memory devices

Read threshold optimization systems and methods using domain transformation

Systems and methods for modeless read threshold voltage estimation

Read threshold voltage estimation systems and methods for parametric PV-level modeling

Compression framework for log-likelihood ratio generation

Memory system with low-complexity decoding and method of operating such memory system

Memory system with error-reduction scheme for decoding and method of operating such memory system

Read retry threshold voltage selection

Parallel system to calculate low density parity check

GUANGZHOU MIBO ZHILIAN TECH CO LTD

Fence

Fence

Fixed sleeve for rod

Hinged quick installation fence

UNIV POLYTECHNIC

Signaling for reserving a communications path

UNIV CALIFORNIA

High throughput communication system

HUAWEI TECH CO LTD

Encryption and decryption method and device