P

Inventor

BEINGLASS ISRAEL

60 patents
⚠️ This page may combine multiple inventors who share the name “BEINGLASS ISRAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

APPLIED MATERIALS INC

26 patents
US5645646AJul 8, 1997

Susceptor for deposition apparatus

APPLIED MATERIALS INC406 citations99
US5607724AMar 4, 1997

Low temperature high pressure silicon deposition method

APPLIED MATERIALS INC102 citations99
US5551982ASep 3, 1996

Semiconductor wafer process chamber with susceptor back coating

APPLIED MATERIALS INC136 citations99
US5352636AOct 4, 1994

In situ method for cleaning silicon surface and forming layer thereon in same chamber

APPLIED MATERIALS INC305 citations99
US6197694B1Mar 6, 2001

In situ method for cleaning silicon surface and forming layer thereon in same chamber

APPLIED MATERIALS INC86 citations98
US5932286AAug 3, 1999

Deposition of silicon nitride thin films

APPLIED MATERIALS INC136 citations98
US6169030B1Jan 2, 2001

Metallization process and method

APPLIED MATERIALS INC57 citations96
US5876797AMar 2, 1999

Low temperature high pressure silicon deposition method

APPLIED MATERIALS INC81 citations96
US5700520ADec 23, 1997

Low temperature, high pressure silicon deposition method

APPLIED MATERIALS INC78 citations96
US5695819ADec 9, 1997

Method of enhancing step coverage of polysilicon deposits

APPLIED MATERIALS INC79 citations96
US5599397AFeb 4, 1997

Semiconductor wafer process chamber with suspector back coating

APPLIED MATERIALS INC43 citations96
US5874129AFeb 23, 1999

Low temperature, high pressure silicon deposition method

APPLIED MATERIALS INC87 citations94
US5614257AMar 25, 1997

Low temperature, high pressure silicon deposition method

APPLIED MATERIALS INC94 citations94
US5141892AAug 25, 1992

Process for depositing highly doped polysilicon layer on stepped surface of semiconductor wafer resulting in enhanced step coverage

APPLIED MATERIALS INC33 citations93
US7427568B2Sep 23, 2008

Method of forming an interconnect structure

APPLIED MATERIALS INC20 citations92
US7115516B2Oct 3, 2006

Method of depositing a material layer

APPLIED MATERIALS INC18 citations92
US6402850B1Jun 11, 2002

Depositing polysilicon films having improved uniformity and apparatus therefor

APPLIED MATERIALS INC28 citations92
US5940733AAug 17, 1999

Method of making polysilicon/tungsten silicide multilayer composite on an integrated circuit structure

APPLIED MATERIALS INC38 citations92
US5834059ANov 10, 1998

Process of depositing a layer of material on a wafer with susceptor back coating

APPLIED MATERIALS INC29 citations92
US5576059ANov 19, 1996

Depositing polysilicon films having improved uniformity and apparatus therefor

APPLIED MATERIALS INC39 citations92
US6954711B2Oct 11, 2005

Test substrate reclamation method and apparatus

APPLIED MATERIALS INC20 citations91
US4975385ADec 4, 1990

Method of constructing lightly doped drain (LDD) integrated circuit structure

APPLIED MATERIALS INC48 citations91
US7401066B2Jul 15, 2008

Correlation of end-of-line data mining with process tool data mining

APPLIED MATERIALS INC25 citations88
US6017144AJan 25, 2000

Method and apparatus for depositing highly oriented and reflective crystalline layers using a low temperature seeding layer

APPLIED MATERIALS INC50 citations88
US7772121B2Aug 10, 2010

Method of forming a trench structure

APPLIED MATERIALS INC12 citations84
US5725673AMar 10, 1998

Semiconductor wafer process chamber with susceptor back coating

APPLIED MATERIALS INC14 citations82

OR-BACH ZVI

15 patents
US8541819B1Sep 24, 2013

Semiconductor device and structure

OR-BACH ZVI152 citations99
US8058137B1Nov 15, 2011

Method for fabrication of a semiconductor device and structure

OR-BACH ZVI129 citations99
US9136153B2Sep 15, 2015

3D semiconductor device and structure with back-bias

OR-BACH ZVI53 citations98
US8754533B2Jun 17, 2014

Monolithic three-dimensional semiconductor device and structure

OR-BACH ZVI68 citations98
US8395191B2Mar 12, 2013

Semiconductor device and structure

OR-BACH ZVI51 citations98
US8273610B2Sep 25, 2012

Method of constructing a semiconductor device and structure

OR-BACH ZVI111 citations98
US8237228B2Aug 7, 2012

System comprising a semiconductor device and structure

OR-BACH ZVI72 citations98
US9711407B2Jul 18, 2017

Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer

OR-BACH ZVI29 citations93
US8709880B2Apr 29, 2014

Method for fabrication of a semiconductor device and structure

OR-BACH ZVI14 citations93
US8294159B2Oct 23, 2012

Method for fabrication of a semiconductor device and structure

OR-BACH ZVI35 citations93
US8153499B2Apr 10, 2012

Method for fabrication of a semiconductor device and structure

OR-BACH ZVI37 citations93
US8148728B2Apr 3, 2012

Method for fabrication of a semiconductor device and structure

OR-BACH ZVI22 citations93
US8907442B2Dec 9, 2014

System comprising a semiconductor device and structure

OR-BACH ZVI11 citations84
US8664042B2Mar 4, 2014

Method for fabrication of configurable systems

OR-BACH ZVI8 citations84
US8405420B2Mar 26, 2013

System comprising a semiconductor device and structure

OR-BACH ZVI10 citations83

MONOLITHIC 3D INC

8 patents

INTEL CORP

1 patent

Showing the top 50 of 60 patents by PatentIndex Score.