Inventor

CHINDALORE GOWRISHANKAR L

US62 patents

⚠️ This page may combine multiple inventors who share the name “CHINDALORE GOWRISHANKAR L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHINDALORE GOWRISHANKAR L

FREESCALE SEMICONDUCTOR INC

Non-volatile memory device and method for forming

Split gate memory cell in a FinFET

Electronic device including an array and process for forming the same

Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench

Method of forming a nanocluster charge storage device

One time programmable memory and method of operation

Programming, erasing, and reading structure for an NVM cell

Source side injection storage device with spacer gates and method therefor

Method for forming a memory structure using a modified surface topography and structure thereof

Method for removing nanoclusters from selected regions

Variable gate bias for a reference transistor in a non-volatile memory

Method for integrating NVM circuitry with logic circuitry

Electronic device including discontinuous storage elements

Method of fabricating a storage device including decontinuous storage elements within and between trenches

Nanocrystal bitcell process integration for high density application

Process for forming an electronic device including discontinuous storage elements

Electronic device including discontinuous storage elements

Non-volatile memory having a reference transistor

Split-gate non-volatile memory cell and method

Method of forming a semiconductor device in a semiconductor layer and structure thereof

Method of programming a non-volatile memory

Process for forming an electronic device including discontinuous storage elements

Method for maintaining topographical uniformity of a semiconductor memory array

Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming

Process for operating an electronic device including a memory array and conductive lines

Method and apparatus for maintaining topographical uniformity of a semiconductor memory array

Method for forming a multi-bit non-volatile memory device

Non-volatile memory having a reference transistor and method for forming

Non-volatile memory having a bias on the source electrode for HCI programming

Programming of a memory with discrete charge storage elements

Back-gated semiconductor device with a storage layer and methods for forming thereof

Electronic device including a nonvolatile memory array and methods of using the same

Bit cell reference device and methods thereof

Floating gate non-volatile memory and method thereof

Process for forming an electronic device including discontinuous storage elements

Electronic device including discontinuous storage elements

Source side injection storage device with spacer gates and method therefor

Electronic device including a memory array and conductive lines

Programmable structure including discontinuous storage elements and spacer control gates in a trench

Source side injection storage device with control gates adjacent to shared source/drain and method therefor

Memory cell using a dielectric having non-uniform thickness

Nonvolatile storage array with continuous control gate employing hot carrier injection programming

Electronic device including discontinuous storage elements and a process for forming the same

Source side injection storage device with spacer gates and method therefor

Programming and erasing structure for a floating gate memory cell and method of making

MOTOROLA INC

Non-volatile memory device having an anti-punch through (APT) region

Erase of a non-volatile memory

HERRICK MATTHEW T

Method of making a split gate memory cell

KANG SUNG-TAEG

Split gate device and method for forming

WHITE TED R

Split-gate non-volatile memory cell having improved overlap tolerance and method therefor