Inventor

LIAO WEN-SHIANG

TW110 patents

⚠️ This page may combine multiple inventors who share the name “LIAO WEN-SHIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIAO WEN-SHIANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor structure and manufacturing method thereof

Antenna cavity structure for integrated patch antenna in integrated fan-out packaging

Vertical metal insulator metal capacitor

Antenna cavity structure for integrated patch antenna in integrated fan-out packaging

Semiconductor package device with integrated antenna and manufacturing method thereof

Integrated fan-out package with 3D magnetic core inductor

Semiconductor structure having multiple dielectric waveguide channels and method for forming semiconductor structure

Semiconductor package device with integrated antenna and manufacturing method thereof

3D IC decoupling capacitor structure and method for manufacturing the same

Semiconductor package device with integrated antenna and manufacturing method thereof

Chip package having integrated capacitor

Inter-fan-out wafer level packaging with coaxial TIV for 3D IC low-noise packaging

Integrated fan-out package with 3D magnetic core inductor

Semiconductor structure including one or more antenna structures

Semiconductor package device with integrated inductor and manufacturing method thereof

Thermally tunable waveguide and photonic integrated circuit component having the same

Integrated fan-out package with 3D magnetic core inductor

Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits

Integrated patch antenna having insulating substrate with antenna cavity and high-K dielectric

Waveguide structure and method for forming the same

Semiconductor structure and method of fabricating the same

3DIC package integration for high-frequency RF system

Antenna package for signal transmission

3D IC decoupling capacitor structure and method for manufacturing the same

3D IC antenna array with laminated high-k dielectric

Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits

Semiconductor arrangement and method of making

3D IC Decoupling capacitor structure and method for manufacturing the same

3DIC package integration for high-frequency RF system

Patch antenna structures and methods

Semiconductor structure and manufacturing method thereof

Method of forming semiconductor structure

Method of fabricating magnetic core inductors for an integrated voltage regulator

Apparatus for optical coupling and system for communication

Apparatus for optical coupling and system for communication

Integrated optical devices and methods of forming the same

Manufacturing method of semiconductor structure

Semiconductor package and manufacturing method thereof

Semiconductor structure having multiple dielectric waveguide channels and method for forming semiconductor structure

Low-noise package and method

UNITED MICROELECTRONICS CORP

Triple gate device having strained-silicon channel

Method of fabricating a double gate MOSFET device

Structure of a trapezoid-triple-gate FET

Metal oxide semiconductor transistor and fabrication method thereof

VANGUARD INT SEMICONDUCT CORP

Method for forming self-aligned contact with liner

Mask reduction process with a method of forming a raised fuse and a fuse window with sidewall passivation

Method for controlling the thickness of a passivation layer on a semiconductor device

WINBOND ELECTRONICS CORP

Method of fabricating self-aligned silicide

Method for forming a self-aligned silicide of a metal oxide semiconductor

NAT SCIENCE COUNCIL

Low temperature-deposited passivation film over semiconductor device