Inventor · disambiguated record
Piotr Szabelski
Also filed as: SZABELSKI PIOTR
16 granted patents·1 pending application·827 citations·filing 1999–2008
96Inventor score
Technology areasG06F
Files withINFINEON TECHNOLOGIES AG11STANDARD MICROSYST SMC3INFINEION TECHNOLOGIES AG1INFINEON AG1SZABELSKI PIOTR1
Top patents by PatentIndex Score
17 records- 0191US6526484B1Methods and apparatus for reordering of the memory requests to achieve higher average utilization of the command and data busINFINEON TECHNOLOGIES AG·Filed 1999·Granted Feb 25, 2003·189 cites·48 claims
- 0288US6216178B1Methods and apparatus for detecting the collision of data on a data bus in case of out-of-order memory accesses of different times of memory access executionINFINEON TECHNOLOGIES AG·Filed 1999·Granted Apr 10, 2001·137 cites·8 claims
- 0386US6959355B2Universal serial bus hub with shared high speed handlerSTANDARD MICROSYST SMC·Filed 2003·Granted Oct 25, 2005·37 cites·9 claims
- 0485US6587894B1Apparatus for detecting data collision on data bus for out-of-order memory accesses with access execution time based in part on characterization data specific to memoryINFINEON TECHNOLOGIES AG·Filed 2000·Granted Jul 1, 2003·41 cites·10 claims
- 0584US7484018B2Universal serial bus hub with shared high speed handler implementing respective downstream transfer ratesSTANDARD MICROSYST SMC·Filed 2005·Granted Jan 27, 2009·11 cites·18 claims
- 0684US6430642B1Methods and apparatus for prioritization of access to external devicesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 6, 2002·34 cites·10 claims
- 0781US7185126B2Universal serial bus hub with shared transaction translator memorySTANDARD MICROSYST SMC·Filed 2003·Granted Feb 27, 2007·31 cites·22 claims
- 0877US6195724B1Methods and apparatus for prioritization of access to external devicesINFINEON TECHNOLOGIES AG·Filed 1999·Granted Feb 27, 2001·70 cites·11 claims
- 0971US6510474B1Methods and apparatus for re-reordering command and data packets in order to restore an original order of out-of-order memory requestsINFINEON TECHNOLOGIES AG·Filed 1999·Granted Jan 21, 2003·62 cites·7 claims
- 1060US6378049B1Universal memory controllerINFINEON TECHNOLOGIES AG·Filed 1999·Granted Apr 23, 2002·37 cites·16 claims
- 1157US6286075B1Method of speeding up access to a memory page using a number of M page tag registers to track a state of physical pages in a memory device having N memory banks where N is greater than MINFINEON TECHNOLOGIES AG·Filed 1999·Granted Sep 4, 2001·34 cites·12 claims
- 1256US6532505B1Universal resource access controllerINFINEON TECHNOLOGIES AG·Filed 1999·Granted Mar 11, 2003·30 cites·18 claims
- 1356US6374323B1Computer memory conflict avoidance using page registersINFINEON TECHNOLOGIES AG·Filed 1999·Granted Apr 16, 2002·32 cites·3 claims
- 1455US6385708B1Using a timing-look-up-table and page timers to determine the time between two consecutive memory accessesINFINEON TECHNOLOGIES AG·Filed 1999·Granted May 7, 2002·29 cites·14 claims
- 1554US2009100209A1Universal serial bus hub with shared high speed handlerSZABELSKI PIOTR·Filed 2008·Application pending·0 cites
- 1652US6453370B1Using of bank tag registers to avoid a background operation collision in memory systemsINFINEION TECHNOLOGIES AG·Filed 1999·Granted Sep 17, 2002·31 cites·14 claims
- 1749US6539440B1Methods and apparatus for prediction of the time between two consecutive memory accessesINFINEON AG·Filed 1999·Granted Mar 25, 2003·22 cites·13 claims
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