Inventor
WEI CHIEN-CHUAN
US25 patents
⚠️ This page may combine multiple inventors who share the name “WEI CHIEN-CHUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MARVELL INT LTD
12 patentsUS8030128B1Oct 4, 2011
Method to form high density phase change memory (PCM) top contact every two bits
MARVELL INT LTD21 citations92
US7939445B1May 10, 2011
High density via and metal interconnect structures, and methods of forming the same
MARVELL INT LTD17 citations84
US7745809B1Jun 29, 2010
Ultra high density phase change memory having improved emitter contacts, improved GST cell reliability and highly matched UHD GST cells using column mirco-trench strips
MARVELL INT LTD9 citations84
US7704875B1Apr 27, 2010
High-density contact holes
MARVELL INT LTD11 citations84
US7994052B1Aug 9, 2011
High-density patterning
MARVELL INT LTD2 citations63
US7985616B1Jul 26, 2011
Methods to form wide heater trenches and to form memory cells to engage heaters
MARVELL INT LTD3 citations63
US7863709B1Jan 4, 2011
Low base resistance bipolar junction transistor array
MARVELL INT LTD2 citations63
US7807539B1Oct 5, 2010
Ion implantation and process sequence to form smaller base pick-up
MARVELL INT LTD4 citations63
US9245961B1Jan 26, 2016
Reducing source contact to gate spacing to decrease transistor pitch
MARVELL INT LTD1 citations52
US8753976B1Jun 17, 2014
Methods and apparatus for etching photo-resist material through multiple exposures of the photo-resist material
MARVELL INT LTD0 citations52
US8003523B1Aug 23, 2011
Methods for forming a plurality of contact holes in a microelectric device
MARVELL INT LTD0 citations52
US7939414B1May 10, 2011
Ion implantation and process sequence to form smaller base pick-up
MARVELL INT LTD1 citations52
MARVELL WORLD TRADE LTD
8 patentsUS7834341B2Nov 16, 2010
Phase change material (PCM) memory devices with bipolar junction transistors and methods for making thereof
MARVELL WORLD TRADE LTD9 citations84
US9768144B2Sep 19, 2017
Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate
MARVELL WORLD TRADE LTD11 citations83
US8368214B2Feb 5, 2013
Alpha shielding techniques and configurations
MARVELL WORLD TRADE LTD8 citations82
US9275929B2Mar 1, 2016
Package assembly having a semiconductor substrate
MARVELL WORLD TRADE LTD6 citations73
US7888166B2Feb 15, 2011
Method to form high efficiency GST cell using a double heater cut
MARVELL WORLD TRADE LTD3 citations63
US7709835B2May 4, 2010
Method to form high efficiency GST cell using a double heater cut
MARVELL WORLD TRADE LTD3 citations63
US9391045B2Jul 12, 2016
Recessed semiconductor substrates and associated techniques
MARVELL WORLD TRADE LTD0 citations51
US8603861B2Dec 10, 2013
Alpha shielding techniques and configurations
MARVELL WORLD TRADE LTD0 citations50
WU ALBERT
4 patentsUS8999786B1Apr 7, 2015
Reducing source contact to gate spacing to decrease transistor pitch
WU ALBERT9 citations84
US9257410B2Feb 9, 2016
Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate
WU ALBERT2 citations62
US8501619B1Aug 6, 2013
Methods for forming a plurality of contact holes in a microelectronic device
WU ALBERT1 citations62
US9034730B2May 19, 2015
Recessed semiconductor substrates and associated techniques
WU ALBERT0 citations51