Inventor

CHIEN SUN-CHIEH

TW74 patents

⚠️ This page may combine multiple inventors who share the name “CHIEN SUN-CHIEH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHIEN SUN-CHIEH

UNITED MICROELECTRONICS CORP

Method for fabricating capacitors of a dynamic random access memory

Multiple well device and process of manufacture

Method of fabricating an asymmetric lightly doped drain transistor device

Method of fabrication of a contact plug in an embedded memory

Method of fabricating memory device and logic device on the same chip

Method of forming dynamic random access memory

Method for in-situ fabrication of a landing via and a strip contact in an embedded memory

Method of fabricating a MOS transistor in an embedded memory

Method for manufacturing embedded memory with different spacer widths

Method of forming a capacitor

Method for fabricating capacitors of a dynamic random access memory

Polycide bonding pad structure

Method of bonding an aluminum wire to an intergrated circuit bond pad

Selective metal wiring and plug process

Method of cleaning a dual damascene structure

Method to increase DRAM cell capacitance

Method for fabricating a cylinder capacitor

Method of fabricating DRAM capacitors

Method for forming a planar field oxide (fox) on substrates for integrated circuit

Method for interconnecting semiconductor devices

Method for selective tungsten sidewall and bottom contact formation

Method for planarizing an insulator on a semiconductor substrate using ion implantation

Peroxide clean before buried contact polysilicon deposition

Method of making a low power SRAM

Method for making an embedded memory MOS

Fabrication method for an embedded dynamic random access memory (DRAM)

Method of fabricating contact openings for dynamic random-access memory

Method of fabricating a Fin/HSG DRAM cell capacitor

Use of oxide spacers formed by liquid phase deposition

Trench-capacitor DRAM device and manufacture method thereof

Self-aligned silicide process for forming silicide layer over word lines in DRAM and transistors in logic circuit region

Method of cleaning a dual damascene structure

Method for fabricating a MOS transistor of an embedded memory

Memory structure with thin film transistor and method for fabricating the same

Method of making a local interconnect in an embedded memory

Method of fabricating a capacitor of dynamic random access memory

Method of fabricating cylinder capacitors

Method of fabricating a fin/cavity capacitor structure for DRAM cell

Method of making a blanket N-well structure for SRAM data stability in P-type substrates

Method for fabricating a local interconnection structure

Method of forming MOSFET devices with heavily doped local channel stops

Method of contact planarization

Process for forming a butting contact through a gate electrode

Method for fabricating self-aligned polysilicon contacts on FET source/drain areas

Method of preventing current leakage around a shallow trench isolation structure

Method of fabricating self-aligned contact

UNITED MICRO ELECTRONICS CORP

Blanket N-LDD implantation for sub-micron MOS device manufacturing

(unassigned)

Method of fabricating DRAM capacitor

UNITED MICROELECTRONIC CORP

Method for fabricating a MOS transistor of an embedded memory

LIN YUNG-CHANG

Through silicon via structure having protection ring