Inventor

LEMKE STEVEN

US42 patents

⚠️ This page may combine multiple inventors who share the name “LEMKE STEVEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEMKE STEVEN

SILICON STORAGE TECH INC

Memory device and method for varying program state separation based upon frequency of use

High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Testing circuitry and methods for analog neural memory in artificial neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Neural network classifier using array of three-gate non-volatile memory cells

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Neural network classifier using array of two-gate non-volatile memory cells

Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism

Neural network classifier using array of three-gate non-volatile memory cells

Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array

Neural network classifier using array of stacked gate non-volatile memory cells

Neural network classifier using array of four-gate non-volatile memory cells

Method of making embedded memory device with silicon-on-insulator substrate

Temperature and leakage compensation for memory cells in an analog neural memory system used in a deep learning neural network

Neural network classifier using array of three-gate non-volatile memory cells

Neural network classifier using array of three-gate non-volatile memory cells

Neural network classifier using array of three-gate non-volatile memory cells

Input function circuit block and output neuron circuit block coupled to a vector-by-matrix multiplication array in an artificial neural network

Circuitry to compensate for data drift in analog neural memory in an artificial neural network

Neural network classifier using array of three-gate non-volatile memory cells

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network

Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network

Temperature compensation for memory cells in an analog neural memory system used in a deep learning neural network

Testing of analog neural memory cells in an artificial neural network

Setting levels for a programming operation in a neural network array

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Neural network array comprising one or more coarse cells and one or more fine cells

Compensation for leakage in an array of analog neural memory cells in an artificial neural network

Testing circuitry and methods for analog neural memory in artificial neural network

Method of making embedded memory device with silicon-on-insulator substrate

Ultra-precise tuning of analog neural memory cells in a deep learning artificial neural network

Precise programming method and apparatus for analog neural memory in an artificial neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling

Memory cell array with row direction gap between erase gate lines and dummy floating gates

System and method for implementing temperature compensation in a memory device

Resistive random access memory (RRAM) cell filament formation using current waveforms

PALMONE INC

Method for controlling software in an electronic system having an insertable peripheral device