Inventor

KO JOE

TW41 patents

⚠️ This page may combine multiple inventors who share the name “KO JOE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KO JOE

UNITED MICROELECTRONICS CORP

Complementary LVTSCR ESD protection circuit for sub-micron CMOS integrated circuits

Device for preventing antenna effect on circuit

Layout design to eliminate process antenna effect

Buried structure SRAM cell and methods for fabrication

ESD protection improvement

Complementary-SCR electrostatic discharge protection circuit

Method of fabricating a mixed circuit capacitor

Local punchthrough stop for ultra large scale integration devices

Field effect transistor structure of a diving channel device

Method of making retarded DDD (double diffused drain) device structure

Maskless method for formation of a field implant channel stop region

Self-aligned anti-punchthrough implantation process

Method of making field effect transistor structure of a diving channel device

Grounding method to eliminate the antenna effect in VLSI process

&#34;Bird-beak-less&#34; field isolation method

Method for ESD protection improvement

Surface counter-doped N-LDD for high hot carrier reliability

Process of forming a field effect transistor without spacer mask edge defects

Method of forming shallow trench isolation

Method of making layout design to eliminate process antenna effect

Surface counter doped N-LDD for high carrier reliability

CMOS ESD protection circuit with parasitic SCR structures

Method for forming a self-aligned silicide layer

Method of fabricating flash memory

Grounding method for eliminating process antenna effect

Method of fabricating EPROM memory by individually forming gate oxide and coupling insulator

Retarded double diffused drain device structure

Method of fabricating a buried structure SRAM cell

Method for ESD protection circuit with deep source diffusion

Method for manufacturing capacitor

Method for manufacturing capacitor

Method of stabilizing anti-reflection coating layer

Method for prevention of latch-up of CMOS devices

Method of stabilizing anti-reflection coating layer

Bar circuit for an integrated circuit

UNITED SEMICONDUCTOR CORP

Method for fabricating flash memory

Method for fabricating flash memory cells

Method of fabricating high voltage semiconductor device

Structure of a flash memory

Method of fabricating electrostatic discharge protection device

Method of fabricating an electrically erasable and programmable read-only memory (EEPROM) with improved quality for the tunneling oxide layer therein

"Bird-beak-less" field isolation method