Inventor

HUANG CHING-CHENG

TW76 patents

⚠️ This page may combine multiple inventors who share the name “HUANG CHING-CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG CHING-CHENG

MEGICA CORP

Integrated chip package structure using organic substrate and method of manufacturing the same

Structure and manufacturing method of chip scale package

Electronic component with die and passive device

Method for fabricating chip package

Chip package with die and substrate

Low fabrication cost, fine pitch and high reliability solder bump

Circuitry component with metal layer over die and extending to place not over die

Chip structure and process for forming the same

Chip package with die and substrate

Chip structure and process for forming the same

Method for fabricating circuitry component

Reliable metal bumps on top of I/O pads after removal of test probe marks

Low fabrication cost, high performance, high reliability chip scale package

Low fabrication cost, high performance, high reliability chip scale package

Low fabrication cost, fine pitch and high reliability solder bump

Chip structure and process for forming the same

Integrated chip package structure using organic substrate and method of manufacturing the same

Low fabrication cost, fine pitch and high reliability solder bump

Integrated chip package structure using ceramic substrate and method of manufacturing the same

Chip structure and process for forming the same

MEGIC CORP

Low fabrication cost, high performance, high reliability chip scale package

Low fabrication cost, fine pitch and high reliability solder bump

Chip structure and process for forming the same

Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers

Post passivation metal scheme for high-performance integrated circuit devices

Method of making a low fabrication cost, high performance, high reliability chip scale package

Post passivation metal scheme for high-performance integrated circuit devices

Integrated chip package structure using ceramic substrate and method of manufacturing the same

Chip structure and process for forming the same

Chip structure and process for forming the same

Integrated chip package structure using silicon substrate and method of manufacturing the same

Reliable metal bumps on top of I/O pads after removal of test probe marks

Structure of ceramic package with integrated passive devices

Process of fabricating a chip structure

Chip structure to improve resistance-capacitance delay and reduce energy loss of the chip

LEE JIN-YUAN

Low fabrication cost, fine pitch and high reliability solder bump

Low fabrication cost, high performance, high reliability chip scale package

Chip package

Method for fabricating chip package with die and substrate

Low fabrication cost, high performance, high reliability chip scale package

Structure and manufacturing method of chip scale package

LIN MOU-SHIUNG

Chip package with die and substrate

Integrated chip package structure using organic substrate and method of manufacturing the same

Method for fabricating circuitry component

Integrated chip package structure using metal substrate and method of manufacturing the same

Post passivation metal scheme for high-performance integrated circuit devices

UNIV NAT TAIWAN SCIENCE TECH

Norbornene compounds with cross-linkable groups and their derivatives

Functional norbornenes and polymeric derivatives and fabrication thereof

Norbornene compounds with cross-linkable groups and their derivatives

(unassigned)

Adhesive-free adhesion between polymer surfaces