Inventor

CHEN KUAN-NENG

US55 patents

⚠️ This page may combine multiple inventors who share the name “CHEN KUAN-NENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN KUAN-NENG

IBM

Three-dimensional integrated circuits and techniques for fabrication thereof

Four-terminal reconfigurable devices

Programmable fuse/non-volatile memory structures in BEOL regions using externally heated phase change material

Graphene channel-based devices and methods for fabrication thereof

Graphene channel-based devices and methods for fabrication thereof

Programmable via devices in back end of line level

Techniques for three-dimensional circuit integration

Wafer bonded access device for multi-layer phase change memory using lock-and-key alignment

Hermetic seal and reliable bonding structures for 3D applications

Programmable via devices with air gap isolation

Switch array circuit and system using programmable via structures with phase change materials

Four-terminal programmable via-containing structure and method of fabricating same

CMOS-process-compatible programmable via device

Four-terminal reconfigurable devices

Four-terminal reconfigurable devices

CMOS-process-compatible programmable via device

Hermetic seal and reliable bonding structures for 3D applications

Programmable via structure and method of fabricating same

Methods of forming features in integrated circuits

Bonding of substrates including metal-dielectric patterns with metal raised above dielectric and structures so formed

Graphene channel-based devices and methods for fabrication thereof

CMOS-process-compatible programmable via device

Programmable via devices with air gap isolation

Programmable via structure and method of fabricating same

CHEN KUAN-NENG

Bonding of substrates including metal-dielectric patterns with metal raised above dielectric and structures so formed

Bonding of substrates including metal-dielectric patterns with metal raised above dielectric

Scalable transfer-join bonding lock-and-key structures

Integrated circuit device

Submicron connection layer and method for using the same to connect wafers

Precise-aligned lock-and-key bonding structures

Programmable via devices

Programmable via devices

Programmable via devices in back end of line level

Electrical test structure applying 3D-ICS bonding technology for stacking error measurement

Methods of forming tubular objects

Heterostructure containing IC and LED and method for fabricating the same

ELMEGREEN BRUCE G

Coupling piezoelectric material generated stresses to devices formed in integrated circuits

Coupling piezoelectric material generated stresses to devices formed in integrated circuits

ASSEFA SOLOMON

Three-dimensional integrated circuits and techniques for fabrication thereof

Techniques for three-dimensional circuit integration

AVOURIS PHAEDON

Method to fabricate high performance carbon nanotube transistor integrated circuits by three-dimensional integration technology

Graphene channel-based devices and methods for fabrication thereof

MASSACHUSETTS INST TECHNOLOGY

Method of forming a multi-layer semiconductor structure incorporating a processing handle member

ADVANCED SEMICONDUCTOR ENG

Sloped bonding structure for semiconductor package

ADVANCED SEMICONDUCTOR INC

Bonding structure for semiconductor package and method of manufacturing the same

IND TECH RES INST

Semiconductor device, manufacturing method and stacking structure thereof

SINGER COMPANY NV

Pattern generator mechanism for zig-zag sewing machine

CHANG CHI-CHUNG

Through silicon via-based oscillator wafer-level-package structure and method for fabricating the same

UNIV NAT CHIAO TUNG

Heterostructure containing IC and LED and method for fabricating the same

TRON FUTURE TECH INC

Antenna package and method for manufacturing an antenna package