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Inventor

STEIGERWALT MICHAEL D

US16 patents
⚠️ This page may combine multiple inventors who share the name “STEIGERWALT MICHAEL D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

13 patents
US7118986B2Oct 10, 2006

STI formation in semiconductor device including SOI and bulk silicon regions

IBM258 citations98
US7375410B2May 20, 2008

Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof

IBM17 citations92
US7115965B2Oct 3, 2006

Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation

IBM16 citations92
US6440807B1Aug 27, 2002

Surface engineering to prevent EPI growth on gate poly during selective EPI processing

IBM31 citations92
US6964897B2Nov 15, 2005

SOI trench capacitor cell incorporating a low-leakage floating body array transistor

IBM50 citations89
US7115463B2Oct 3, 2006

Patterning SOI with silicon mask to create box at different depths

IBM16 citations84
US7485537B2Feb 3, 2009

Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness

IBM12 citations83
US7691716B2Apr 6, 2010

Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation

IBM10 citations82
US7911024B2Mar 22, 2011

Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof

IBM6 citations73
US6900092B2May 31, 2005

Surface engineering to prevent epi growth on gate poly during selective epi processing

IBM11 citations73
US7763518B2Jul 27, 2010

Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof

IBM4 citations62
US7394131B2Jul 1, 2008

STI formation in semiconductor device including SOI and bulk silicon regions

IBM4 citations62
US6995094B2Feb 7, 2006

Method for deep trench etching through a buried insulator layer

IBM0 citations51

GREENE BRIAN J

2 patents

HARLEY ERIC C T

1 patent