Inventor
MANDHANI ARVIND
US34 patents
⚠️ This page may combine multiple inventors who share the name “MANDHANI ARVIND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
20 patentsUS7783819B2Aug 24, 2010
Integrating non-peripheral component interconnect (PCI) resources into a personal computer system
INTEL CORP29 citations96
US7725757B2May 25, 2010
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP75 citations94
US8010731B2Aug 30, 2011
Integrating non-peripheral component interconnect (PCI) resource into a personal computer system
INTEL CORP23 citations92
US8850247B2Sep 30, 2014
Power management for a system on a chip (SoC)
INTEL CORP4 citations83
US9600433B2Mar 21, 2017
System, apparatus and method for integrating non-peripheral component interconnect (PCI) resources into a personal computer system
INTEL CORP2 citations73
US7475269B2Jan 6, 2009
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP6 citations72
US9665153B2May 30, 2017
Selecting a low power state based on cache flush latency determination
INTEL CORP2 citations71
US9158363B2Oct 13, 2015
Power management for a system on a chip (SoC)
INTEL CORP3 citations62
US8380908B2Feb 19, 2013
Emulation of an input/output advanced programmable interrupt controller
INTEL CORP2 citations62
US8037230B2Oct 11, 2011
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
INTEL CORP1 citations62
US7861027B2Dec 28, 2010
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
INTEL CORP3 citations62
US7571341B2Aug 4, 2009
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP3 citations61
US7272736B2Sep 18, 2007
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP2 citations61
US10963038B2Mar 30, 2021
Selecting a low power state based on cache flush latency determination
INTEL CORP0 citations60
US9547618B2Jan 17, 2017
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
INTEL CORP0 citations52
US8751722B2Jun 10, 2014
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
INTEL CORP0 citations52
US8745303B2Jun 3, 2014
Integrating non-peripheral component interconnect (PCI) resources into a computer system
INTEL CORP0 citations52
US10198065B2Feb 5, 2019
Selecting a low power state based on cache flush latency determination
INTEL CORP0 citations50
US8966149B2Feb 24, 2015
Emulation of an input/output advanced programmable interrupt controller
INTEL CORP0 citations50
US9665522B2May 30, 2017
Protocol neutral fabric
INTEL CORP0 citations49
AMAZON TECH INC
6 patentsUS11537853B1Dec 27, 2022
Decompression and compression of neural network data using different compression schemes
AMAZON TECH INC14 citations93
US11868867B1Jan 9, 2024
Decompression and compression of neural network data using different compression schemes
AMAZON TECH INC8 citations84
US9812146B1Nov 7, 2017
Synchronization of inbound and outbound audio in a heterogeneous echo cancellation system
AMAZON TECH INC16 citations83
US10629199B1Apr 21, 2020
Architectures and topologies for vehicle-based, voice-controlled devices
AMAZON TECH INC14 citations82
US10540970B2Jan 21, 2020
Architectures and topologies for vehicle-based, voice-controlled devices
AMAZON TECH INC2 citations69
US12169786B1Dec 17, 2024
Neural network accelerator with reconfigurable memory
AMAZON TECH INC1 citations66
HAN WOOJONG
2 patentsMANDHANI ARVIND
2 patentsSHOEMAKER KEN
2 patentsUS8205029B2Jun 19, 2012
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
SHOEMAKER KEN1 citations60
US8433841B2Apr 30, 2013
Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC)
SHOEMAKER KEN0 citations50