Inventor

DUANE MICHAEL

US38 patents

⚠️ This page may combine multiple inventors who share the name “DUANE MICHAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUANE MICHAEL

ADVANCED MICRO DEVICES INC

Ultra-high-density pass gate using dual stacked transistors having a gate structure with planarized upper surface in relation to interlayer insulator

Method of making an IGFET with a non-uniform lateral doping profile in the channel region

Method of making an IGFET with a selectively doped gate in combination with a protected resistor

Method of making an asymmetrical IGFET with a silicide contact on the drain without a silicide contact on the source

Integrated circuit including an oxide-isolated localized substrate and a standard silicon substrate and fabrication method

Integrated circuit including a graded grain structure for enhanced transistor formation and fabrication method thereof

Semiconductor device having reduced overlap capacitance and method of manufacture thereof

Semiconductor device having reduced overlap capacitance and method of manufacture thereof

Method for making semiconductor device having nitrogen-rich active region-channel interface

Ultra short transistor fabrication method

Vertically integrated advanced transistor formation

Method of making vertical MOSFET with sub-trench source contact

Elevated transistor fabrication technique

Elevated transistor fabrication technique

Asymmetrical MOSFET with gate pattern after source/drain formation

Semiconductor device having an elevated active region formed in an oxide trench and method of manufacture thereof

Elevated transistor fabrication technique

Asymmetrical transistor structure

Semiconductor device having an elevated active region formed from a thick polysilicon layer and method of manufacture thereof

Semiconductor device having an elevated active region formed in an oxide trench

Semiconductor device having one or more asymmetric background dopant regions and method of manufacture thereof

MIE FUJITSU SEMICONDUCTOR LTD

High uniformity screen and epitaxial layers for CMOS devices

Semiconductor structure with multiple transistors having various threshold voltages

Method for fabricating a transistor with reduced junction leakage current

Semiconductor structure with multiple transistors having various threshold voltages

Semiconductor structure with multiple transistors having various threshold voltages

Semiconductor structure with multiple transistors having various threshold voltages

CMOS structures and processes based on selective thinning

BLOCK INC

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Peer-to-peer data object transfer and state management

Automated event tracking and conditional asset transfer

Customized generation and secure authenticated processing of transfer instrument

Optimization of data presentation

THOMPSON SCOTT E

Transistor having reduced junction leakage and methods of forming thereof

CMOS structures and processes based on selective thinning

SUVOLTA INC

Deeply depleted MOS transistors having a screening layer and methods thereof

SCUDDER LANCE

Semiconductor structure with substitutional boron and method for fabrication thereof

SQUARE INC

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