Inventor

MAHESHWARI DINESH

US75 patents

⚠️ This page may combine multiple inventors who share the name “MAHESHWARI DINESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAHESHWARI DINESH

NETLOGIC MICROSYSTEMS INC

Row expansion reduction by inversion for range representation in ternary content addressable memories

Content addressable memory (CAM) cell with single ended write multiplexing

Ternary content addressable memory (TCAM) cells with low signal line numbers

Content addressable memory (CAM) cell having column-wise conditional data pre-write

Content addressable memory cell configurable between multiple modes and method therefor

Row expansion reduction by inversion for range representation in ternary content addressable memories

Content addressable memory (CAM) cell having column-wise conditional data pre-write

Method and device for limiting current rate changes in block selectable search engine

Priority encoder circuit and method

Content addressable memory device

Content comparator memory (CCM) device and method of operation

ZENO SEMICONDUCTOR INC

Memory device comprising an electrically floating body transistor and methods of using

Memory device comprising an electrically floating body transistor and methods of using

MOSFET and memory cell having improved drain current through back bias application

Memory device comprising an electrically floating body transistor and methods of operating

Memory device comprising an electrically floating body transistor and methods of using

Memory device comprising an electrically floating body transistor and methods of operating

MOSFET and memory cell having improved drain current through back bias application

Memory device comprising an electrically floating body transistor and methods of using

CYPRESS SEMICONDUCTOR CORP

Automatic built-in self-test of logic with seeding from on-chip memory

Bridge device with page-access based processor interface

Multiprocessor system having an input/output (I/O) bridge circuit for transferring data between volatile and non-volatile memory

Cascading optical switch three dimensional switch fabric system and method

System and method of acquiring delay, setup and hold values for integrated circuit cells

Accurate and realistic corner characterization of standard cells

Multi-channel, multi-bank memory with wide data input/output

Optical switch cascading system and method with fixed incidence angle correction

SILICON LIGHT MACHINES CORP

High contrast tilting ribbon blazed grating

Method and apparatus for leveling thermal stress variations in multi-layer MEMS devices

Chirped optical MEM device

Tilt-able grating plane for improved crosstalk in 1×N blaze switches

Arbitrary phase profile for better equalization in dynamic gain equalizer

PDL mitigation structure for diffractive MEMS and gratings

MAHESHWARI DINESH

Memory devices and systems including cache devices for memory modules

Methods for logically combining range representation values in a content addressable memory

Memory devices and methods for high random transaction rate

Multi-port integrated circuit devices and methods

Memory devices having embedded hardware acceleration and corresponding methods

SILICON LIGHT MACHINES INC

Blazed grating light valve

Diffractive light modulator with dynamically rotatable diffraction plane

Method and apparatus for measuring wavelength jitter of light signal

Patterned diffractive light modulator ribbon for PDL reduction

GROQ INC

Circuits and methods for updating lookup tables

Energy provisioning

Deterministic near-compute memory for deterministic processor and enhanced data movement between memory units and processing units

FUJITSU LTD

Cache memory system and method for automatically locking cache entries to prevent selected memory items from being replaced

Debug support in a processor chip

HAN JIN WOO

MOSFET and memory cell having improved drain current through back bias application

SNYDER WARREN

Providing hardware independence to automate code generation of processing device firmware

RAJAMANICKAM JAGADEESAN

Device, method, and protocol for data transfer between host device and device having storage interface