Inventor

WU CHENG-TA

TW113 patents

⚠️ This page may combine multiple inventors who share the name “WU CHENG-TA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WU CHENG-TA

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of forming a device having a doping layer and device formed

Mechanisms for cleaning substrate surface for hybrid bonding

Method of forming gate and finFET

Method for forming a semiconductor-on-insulator (SOI) substrate

SOI substrate, semiconductor device and method for manufacturing the same

Flat STI surface for gate oxide uniformity in Fin FET devices

Semiconductor device having isolation structures with different thickness and method of forming the same

Flat STI surface for gate oxide uniformity in Fin FET devices

Backside illuminated image sensor with negatively charged layer

FinFET structure and method of manufacturing the same

Semiconductor-on-insulator (SOI) substrate and method for forming

Methods for straining a transistor gate through interlayer dielectric (ILD) doping schemes

Fin-type field effect transistor and manufacturing method thereof

Method for forming thin semiconductor-on-insulator (SOI) substrates

Selective polysilicon growth for deep trench polysilicon isolation structure

Method for manufacturing semiconductor structure

Method for forming a semiconductor-on-insulator (SOI) substrate

Conductive contact for ion through-substrate via

Semiconductor-on-insulator (SOI) substrate comprising a trap-rich layer with small grain sizes

Semiconductor structure having trench and manufacturing method thereof

Backside illuminated photo-sensitive device with gradated buffer layer

Method for forming thin semiconductor-on-insulator (SOI) substrates

Apparatus for reducing stripe patterns

Method for forming deep trench structure

Backside illuminated photo-sensitive device with gradated buffer layer

Mechanisms for forming image sensor device

Mechanisms for cleaning substrate surface for hybrid bonding

Patterning for substrate fabrication

Tilt implantation for STI formation in FinFET structures

Semiconductor-on-insulator (SOI) substrate and method for forming

Fin field effect transistor and method for fabricating the same

Common source oxide formation by in-situ steam oxidation for embedded flash

FinFET with doped isolation insulating layer

RFSOI semiconductor structures including a nitrogen-doped charge-trapping layer and methods of manufacturing the same

Flat STI surface for gate oxide uniformity in Fin FET devices

RF switch device with a sidewall spacer having a low dielectric constant

Method for forming a semiconductor-on-insulator (SOI) substrate

Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer

RF switch device with a sidewall spacer having a low dielectric constant

Method for forming a semiconductor-on-insulator (SOI) substrate

Backside illuminated photo-sensitive device with gradated buffer layer

RF switch device with a sidewall spacer having a low dielectric constant

Method for forming thin semiconductor-on-insulator (SOI) substrates

Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer

TAIWAN SEMICONDUCTOR MFG

Method of reducing delamination in the fabrication of small-pitch devices

Plasmonic nanostructures for organic image sensors

Image device and methods of forming the same

Image sensor trench isolation with conformal doping

LAI CHIH-YU

Image sensor trench isolation with conformal doping

Method of reducing delamination in the fabrication of small-pitch devices