Inventor
MARUYAMA TERUNOBU
JP8 patents
Patents
8 patentsUS5889677AMar 30, 1999
Circuit designing apparatus of an interactive type
FUJITSU LTD220 citations98
US6240541B1May 29, 2001
Interactive circuit designing apparatus which displays a result of component placement and wire routing from a layout design unit
FUJITSU LTD126 citations97
US6260179B1Jul 10, 2001
Cell arrangement evaluating method, storage medium storing cell arrangement evaluating program, cell arranging apparatus and method, and storage medium storing cell arranging program
FUJITSU LTD230 citations95
US5787268AJul 28, 1998
Interactive circuit designing apparatus
FUJITSU LTD69 citations93
US7143375B2Nov 28, 2006
Logical equivalence verifying device, method and computer readable medium thereof
FUJITSU LTD6 citations71
US5892685AApr 6, 1999
Packaging design system for an LSI circuit
FUJITSU LTD12 citations71
US7337414B2Feb 26, 2008
Logical equivalence verifying device, method, and computer-readable medium thereof
FUJITSU LTD4 citations60
US6226778B1May 1, 2001
Method and apparatus for determining locations of circuit elements including sequential circuit elements
FUJITSU LTD3 citations60