Inventor
CHEN YIN-AN
TW11 patents
Patents
11 patentsUS11093681B2Aug 17, 2021
Method and system for generating layout design of integrated circuit
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations82
US10943049B2Mar 9, 2021
Rule check violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD8 citations82
US10810346B2Oct 20, 2020
Static voltage drop (SIR) violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD10 citations82
US11709987B2Jul 25, 2023
Method and system for generating layout design of integrated circuit
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations72
US11816417B2Nov 14, 2023
Rule check violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations71
US11604917B2Mar 14, 2023
Static voltage drop (SIR) violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations71
US11087066B2Aug 10, 2021
Static voltage drop (SIR) violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations71
US12106034B2Oct 1, 2024
Rule check violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US12099793B2Sep 24, 2024
Rule check violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US12242788B2Mar 4, 2025
Method and system for generating layout design of integrated circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US12019971B2Jun 25, 2024
Static voltage drop (SIR) violation prediction systems and methods
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations58