Inventor

GUTSCHE MARTIN

DE50 patents

⚠️ This page may combine multiple inventors who share the name “GUTSCHE MARTIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUTSCHE MARTIN

INFINEON TECHNOLOGIES AG

Method and device for depositing thin layers via ALD/CVD processes in combination with rapid thermal processes

Method of producing a microelectronic electrode structure, and microelectronic electrode structure

Memory cell with nanocrystals or nanodots

Method of fabricating a trench-structure capacitor device

Method for fabricating a trench capacitor

Process for producing sublithographic structures

Method of fabricating dielectric mixed layers and capacitive element and use thereof

Capacitor arrangement with capacitors arranged one in the other

Method for fabricating a hard mask

Tungsten hard mask for dry etching aluminum-containing layers

Method for patterning ceramic layers

Capacitor with electrodes made of ruthenium and method for patterning layers made of ruthenium or ruthenium

Barrier layer and a method for suppressing diffusion processes during the production of semiconductor devices

Method for fabricating a stacked capacitor array having a regular arrangement of a plurality of stacked capacitors

Method of fabricating an oxide collar for a trench capacitor

Nonvolatile integrated semiconductor memory

Method for fabricating memory cells and memory cell array

Method for fabricating a trench capacitor having an insulation collar, which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell

Method for producing vertical patterned layers made of silicon dioxide

Method for fabricating a metal carbide layer and method for fabricating a trench capacitor containing a metal carbide

Method for fabricating capacitor electrodes

Method of plasma etching thin films of difficult to dry etch materials

Vertical interconnect structure, memory device and associated production method

Method for fabricating memory cells for a memory device

Ferroelectric memory arrangement

Charge-trapping memory device and method for production

Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting electrochemical conversion of a substrate material

Multiple deposition of metal layers for the fabrication of an upper capacitor electrode of a trench capacitor

Stacked capacitor array and fabrication method for a stacked capacitor array

Semiconductor memory with memory cells comprising a vertical selection transistor and method for fabricating it

Method and installation for fabricating one-sided buried straps

Fabrication method for a semiconductor structure having integrated capacitors

Method of providing trench walls by using two-step etching processes

Fabrication method for a trench capacitor having an insulation collar

Method for fabricating a memory cell

SIEMENS AG

Dual damascene structure

Memory cell with a stacked capacitor

Memory cell with a stacked capacitor

Deposition of carbon into nitride layer for improved selectivity of oxide to nitride etchrate for self aligned contact etching

Method for forming metallization in semiconductor devices with a self-planarizing material

Removal of post-RIE polymer on Al/Cu metal line

Stacked capacitator memory cell and method of fabrication

Removal of post-rie polymer on A1/CU metal line

GUTSCHE MARTIN

Vertical interconnect structure, memory device and associated production method

Process for producing sublithographic structures

Vertical interconnect structure, memory device and associated production method

IBM

High dielectric constant material deposition to achieve high capacitance

INFINEON TECHNOLOGIES CORP

Metallization etching techniques for reducing post-etch corrosion of metal lines

QIMONDA AG

Method for producing a dielectric material on a semiconductor device and semiconductor device

MATRIQ AG

Mold and device for marking work pieces