Inventor

HOROWITZ MARK A

US154 patents

⚠️ This page may combine multiple inventors who share the name “HOROWITZ MARK A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOROWITZ MARK A

RAMBUS INC

Calibrated data communication system and method

Partial response receiver

Method and apparatus for multi-level signaling

High speed signaling system with adaptive transmit pre-emphasis

Low latency multi-level communication interface

Calibrated data communication system and method

High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation

Integrated circuit with timing adjustment mechanism and method

Apparatus and method for topography dependent signaling

Bus system optimization

Delay locked loop circuitry for clock delay adjustment

Apparatus and method for topography dependent signaling

Apparatus and method for topography dependent signaling

Delay-locked loop circuitry for clock delay adjustment

Circuitry for the delay adjustment of a clock signal

Method and circuitry for clock synchronization

Method and apparatus for implementing refresh in a synchronous DRAM system

Method and apparatus for power control in devices

Testing timing parameters of high speed integrated circuit devices

Electrical current source circuitry for a bus

Integrated circuit heating to effect in-situ annealing

Memory system with error detection and retry modes of operation

Method and circuitry for minimizing clock-data skew in a bus system

High speed bus system

Apparatus and method for topography dependent signaling

Partial response receiver

Low latency multi-level communication interface

Integrated circuit device and signaling method with topographic dependent equalization coefficient

High speed signaling system with adaptive transmit pre-emphasis

High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation

Integrated circuit device that stores a value representative of an equalization co-efficient setting

Memory device having programmable drive strength setting

Delay locked loop circuitry for clock delay adjustment

Apparatus and method for topography dependent signaling

Integrated circuit with transmit phase adjustment

Delay stage circuitry for a ring oscillator

Apparatus and method for pipelined memory operations

Chip having register to store value that represents adjustment to reference voltage

Chip having register to store value that represents adjustment to reference voltage

System and dynamic random access memory device having a receiver

Integrated circuit memory device and signaling method for adjusting drive strength based on topography of integrated circuit devices

Noise-tolerant signaling schemes supporting simplified timing and data recovery

Linear transformation circuits

UNIV LELAND STANFORD JUNIOR

Imaging arrangements and methods therefor

Microscopy arrangements and approaches

Adaptive optical signal processing with multimode waveguides

Multiple interconnected ring oscillator circuit

ZERBE JARED L

Integrating receiver with precharge circuitry

NG YI-REN

Variable imaging arrangements and methods therefor

STOJANOVIC VLADIMIR M

High speed signaling system with adaptive transmit pre-emphasis