Inventor

CHAMBERS JAMES JOSEPH

US35 patents

⚠️ This page may combine multiple inventors who share the name “CHAMBERS JAMES JOSEPH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAMBERS JAMES JOSEPH

TEXAS INSTRUMENTS INC

Methods for sputter deposition of high-k dielectric films

Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same

Methods for transistor gate fabrication and for reducing high-k gate dielectric roughness

Method for the selective removal of high-k dielectrics

Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon

Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation

Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials

Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer

Structure for dual work function metal gate electrodes by control of interface dipoles

Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget

Work function control of metals

Dual work function CMOS devices utilizing carbide based electrodes

Multistage deposition that incorporates nitrogen via an intermediate step

Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer

Work function control of metals

Structure and method for a triple-gate transistor with reverse STI

Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget

High-K metal gate

Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget

High-K metal gate

MOS transistors including SiON gate dielectric with enhanced nitrogen concentration at its sidewalls

Method for dual work function metal gate CMOS with selective capping

Dual work function CMOS devices utilizing carbide based electrodes

Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials

Multiple-gate MOSFET device with lithography independent silicon body thickness

Control of high-k gate dielectric film composition profile for property optimization

Semiconductor device including SiON gate dielectric with portions having different nitrogen concentrations

Methods for fabricating a triple-gate MOSFET transistor

CHAMBERS JAMES JOSEPH

Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer

Structure and method for dual work function metal gate CMOS with selective capping

Method to maximize nitrogen concentration at the top surface of gate dielectrics

Semiconductor device including SiON gate dielectric with portions having different nitrogen concentrations

NIIMI HIROAKI

Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget

Method of substantially reducing the formation of SiGe abnormal growths on polycrystalline electrodes for strained channel PMOS transistors

KIRKPATRICK BRIAN K

Method of forming MOS transistors including SiON gate dielectric with enhanced nitrogen concentration at its sidewalls