Inventor
XU DINGYING
US25 patents
⚠️ This page may combine multiple inventors who share the name “XU DINGYING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
18 patentsUS9543197B2Jan 10, 2017
Package with dielectric or anisotropic conductive (ACF) buildup layer
INTEL CORP7 citations84
US12568831B2Mar 3, 2026
Patternable die attach materials and processes for patterning
INTEL CORP0 citations61
US11923312B2Mar 5, 2024
Patternable die attach materials and processes for patterning
INTEL CORP0 citations61
US12341117B2Jun 24, 2025
Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substrates
INTEL CORP0 citations60
US12581988B2Mar 17, 2026
Microelectronic assemblies with through die attach film connections
INTEL CORP0 citations59
US12354883B2Jul 8, 2025
Omni directional interconnect with magnetic fillers in mold matrix
INTEL CORP0 citations59
US12068222B2Aug 20, 2024
Dummy die structures of a packaged integrated circuit device
INTEL CORP1 citations59
US11340258B2May 24, 2022
Probe pins with etched tips for electrical die test
INTEL CORP0 citations59
US7638867B2Dec 29, 2009
Microelectronic package having solder-filled through-vias
INTEL CORP3 citations58
US12230564B2Feb 18, 2025
Package substrate z-disaggregation with liquid metal interconnects
INTEL CORP1 citations53
US9458283B2Oct 4, 2016
Flexible underfill compositions for enhanced reliability
INTEL CORP0 citations51
US7557036B2Jul 7, 2009
Method, system, and apparatus for filling vias
INTEL CORP0 citations51
US10499461B2Dec 3, 2019
Thermal head with a thermal barrier for integrated circuit die processing
INTEL CORP0 citations50
US9941652B2Apr 10, 2018
Space transformer with perforated metallic plate for electrical die test
INTEL CORP0 citations50
US9793151B2Oct 17, 2017
Stiffener tape for electronic assembly
INTEL CORP0 citations50
US10598696B2Mar 24, 2020
Probe pins with etched tips for electrical die test
INTEL CORP0 citations49
US12033930B2Jul 9, 2024
Selectively roughened copper architectures for low insertion loss conductive features
INTEL CORP0 citations47
US7851342B2Dec 14, 2010
In-situ formation of conductive filling material in through-silicon via
INTEL CORP0 citations41
XU DINGYING
3 patentsUS8287996B2Oct 16, 2012
Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic die
XU DINGYING5 citations71
US9068067B2Jun 30, 2015
Flexible underfill compositions for enhanced reliability
XU DINGYING3 citations60
US8569108B2Oct 29, 2013
Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic die
XU DINGYING0 citations50