Inventor

HWANG CHIEN LING

TW140 patents

⚠️ This page may combine multiple inventors who share the name “HWANG CHIEN LING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HWANG CHIEN LING

TAIWAN SEMICONDUCTOR MFG CO LTD

Aligning bumps in fan-out packaging process

Methods for controlling warpage in packaging

Semiconductor wafer device and manufacturing method thereof

Dam for three-dimensional integrated circuit

Integrated fan-out package and method of fabricating the same

Integrated fan-out package and method of fabricating the same

Mechanisms for forming bonding structures

Method of forming Cu pillar bump with non-metal sidewall spacer and metal top cap

Semiconductor device having a boundary structure, a package on package structure, and a method of making

Via structure for packaging and a method of forming

3D integrated circuit package processing with panel type lid

Methods for controlling warpage in packaging

Method of manufacturing integrated fan-out package

Apparatus for separating wafer from carrier

Integrated circuit package and method

Package structure

Integrated circuit package and method

Dam for three-dimensional integrated circuit

Apparatus for holding semiconductor wafers

Methods for controlling warpage in packaging

Semiconductor device having a boundary structure, a package on package structure, and a method of making

Integrated fan-out package

Cu pillar bump with L-shaped non-metal sidewall protection structure

Methods for stud bump formation

Wafer-level molding chase design

Pick-and-place tool for packaging process

Pillar bumps and process for making same

Chip packages and methods of manufacture thereof

Packaging through pre-formed metal pins

HWANG CHIEN LING

Cu pillar bump with non-metal sidewall spacer and metal top cap

Thermal compressive bonding with separate die-attach and reflow processes

Method of forming semiconductor die

Thermal compressive bonding with separate die-attach and reflow processes

Cu pillar bump with non-metal sidewall protection structure

Post passivation interconnect with oxidation prevention layer

Pick-and-place tool for packaging process

Thermal compressive bond head

Copper pillar bump with cobalt-containing sidewall protection

TAIWAN SEMICONDUCTOR MFG

Fan-out interconnect structure and method for forming same

Methods for controlling warpage in packaging

Method of making a conductive pillar bump with non-metal sidewall protection structure

YU CHEN-HUA

Semiconductor package with through silicon vias

Apparatus for holding semiconductor wafers

LIN CHENG-CHUNG

Pillar bumps and process for making same

WU YI-WEN

Cu pillar bump with non-metal sidewall protection structure

LIU CHUNG-SHI

Protection layer for preventing UBM layer from chemical attack and oxidation

HSIAO YI-LI

Wafer&#39;s ambiance control

LIN YU-LIANG

Polishing apparatus

JANG BOR-PING

Wafer-level underfill and over-molding

LIN YEONG-JYH

Methods for stud bump formation and apparatus for performing the same

Wafer's ambiance control