Inventor · disambiguated record
Herschel A. Ainspan
Also filed as: AINSPAN HERSCHEL · AINSPAN HERSCHEL A · AINSPAN HERSCHEL AKIBA
35 granted patents·2 pending applications·253 citations·filing 1992–2023
97Inventor score
Top patents by PatentIndex Score
37 records- 0197US9699009B1Dual-mode non-return-to-zero (NRZ)/ four-level pulse amplitude modulation (PAM4) receiver with digitally enhanced NRZ sensitivityIBM·Filed 2016·Granted Jul 4, 2017·79 cites·16 claims
- 0295US8779865B2Ultra-compact PLL with wide tuning range and low noiseAINSPAN HERSCHEL A·Filed 2012·Granted Jul 15, 2014·12 cites·11 claims
- 0394US9325332B2Adjusting the magnitude of a capacitance of a digitally controlled circuitIBM·Filed 2015·Granted Apr 26, 2016·9 cites·18 claims
- 0494US9225348B2Prediction based digital control for fractional-N PLLsIBM·Filed 2014·Granted Dec 29, 2015·9 cites·19 claims
- 0591US8183948B2Ultra-compact PLL with wide tuning range and low noiseAINSPAN HERSCHEL A·Filed 2010·Granted May 22, 2012·10 cites·17 claims
- 0690US8704567B2Hybrid phase-locked loop architecturesAINSPAN HERSCHEL A·Filed 2012·Granted Apr 22, 2014·9 cites·7 claims
- 0790US7750701B2Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillatorsIBM·Filed 2008·Granted Jul 6, 2010·20 cites·16 claims
- 0888US7268630B2Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillatorIBM·Filed 2005·Granted Sep 11, 2007·17 cites·7 claims
- 0987US9231605B2Removing deterministic phase errors from fractional-N PLLSIBM·Filed 2014·Granted Jan 5, 2016·5 cites·20 claims
- 1086US9837959B2Adjusting the magnitude of a capacitance of a digitally controlled circuitIBM·Filed 2015·Granted Dec 5, 2017·3 cites·8 claims
- 1186US9191057B2Scalable polarimetric phased array transceiverIBM·Filed 2013·Granted Nov 17, 2015·6 cites·20 claims
- 1284US9081049B2Minimum-spacing circuit design and layout for PICAIBM·Filed 2013·Granted Jul 14, 2015·4 cites·29 claims
- 1384US8138840B2Optimal dithering of a digitally controlled oscillator with clock dithering for gain and bandwidth controlAINSPAN HERSCHEL A·Filed 2009·Granted Mar 20, 2012·14 cites·23 claims
- 1483US7772900B2Phase-locked loop circuits and methods implementing pulsewidth modulation for fine tuning control of digitally controlled oscillatorsIBM·Filed 2008·Granted Aug 10, 2010·12 cites·14 claims
- 1582US11496094B1Voltage-controlled oscillator with centertap biasIBM·Filed 2021·Granted Nov 8, 2022·1 cites·19 claims
- 1681US8704566B2Hybrid phase-locked loop architecturesAINSPAN HERSCHEL A·Filed 2012·Granted Apr 22, 2014·5 cites·16 claims
- 1776US10924310B2Transmitter with fully re-assignable segments for reconfigurable FFE tapsIBM·Filed 2019·Granted Feb 16, 2021·2 cites·20 claims
- 1876US7292115B2Method to differentially control LC voltage-controlled oscillatorsIBM·Filed 2005·Granted Nov 6, 2007·8 cites·20 claims
- 1973US10983192B2Scalable polarimetric phased array transceiverIBM·Filed 2019·Granted Apr 20, 2021·1 cites·20 claims
- 2070US9954486B2Adjusting the magnitude of a capacitance of a digitally controlled circuitIBM·Filed 2016·Granted Apr 24, 2018·1 cites·20 claims
- 2169US8912854B2Structure for an inductor-capacitor voltage-controlled oscillatorIBM·Filed 2013·Granted Dec 16, 2014·2 cites·21 claims
- 2267US7168853B2Digital measuring system and method for integrated circuit chip operating parametersIBM·Filed 2003·Granted Jan 30, 2007·13 cites·4 claims
- 2366US10416283B2Scalable polarimetric phased array transceiverIBM·Filed 2015·Granted Sep 17, 2019·1 cites·20 claims
- 2465US9325331B2Prediction based digital control for fractional-N PLLsIBM·Filed 2015·Granted Apr 26, 2016·1 cites·19 claims
- 2564US9229044B2Minimum-spacing circuit design and layout for PICAAINSPAN HERSCHEL A·Filed 2012·Granted Jan 5, 2016·1 cites·21 claims
- 2662US12301168B2Frequency control in a multi-mode VCOIBM·Filed 2023·Granted May 13, 2025·0 cites·22 claims
- 2758US8928418B2Compensating for process variation in integrated circuit fabricationIBM·Filed 2013·Granted Jan 6, 2015·1 cites·14 claims
- 2856US7813815B2Digital measuring system and method for integrated circuit chip operating parametersIBM·Filed 2006·Granted Oct 12, 2010·2 cites·12 claims
- 2955US7498894B1Varactor system having real or apparent low capacitance densityIBM·Filed 2008·Granted Mar 3, 2009·1 cites·1 claims
- 3053US9930325B2Minimum-spacing circuit design and layout for PICAIBM·Filed 2015·Granted Mar 27, 2018·0 cites·11 claims
- 3152US9281779B2Structure for an inductor-capacitor voltage-controlled oscillatorGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 8, 2016·0 cites·16 claims
- 3250US9337852B2Removing deterministic phase errors from fractional-N PLLsIBM·Filed 2015·Granted May 10, 2016·0 cites·19 claims
- 3348US2013278285A1Minimum-spacing circuit design and layout for picaAINSPAN HERSCHEL A·Filed 2012·Application pending·0 cites
- 3445US7205816B2Variable-gain-amplifier based limiter to remove amplitude modulation from a VCO outputIBM·Filed 2005·Granted Apr 17, 2007·0 cites·20 claims
- 3542US8665034B2Varactor tuning control using redundant numberingAINSPAN HERSCHEL A·Filed 2011·Granted Mar 4, 2014·0 cites·20 claims
- 3641US2007176694A1Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillatorIBM·Filed 2007·Application pending·0 cites
- 3737US5381060ADifferential current switch to super buffer logic level translatorIBM·Filed 1992·Granted Jan 10, 1995·4 cites·15 claims
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