Inventor

ORLOWSKI MARIUS

US21 patents

⚠️ This page may combine multiple inventors who share the name “ORLOWSKI MARIUS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ORLOWSKI MARIUS

MOTOROLA INC

Split-gate vertically oriented EEPROM device and process

High-performance thin-film transistor and SRAM memory cell

Method for manufacturing an insulated gate semiconductor device

Method of recrystallizing an amorphous region of a semiconductor

Process for fabricating a graded-channel MOS device

Method of manufacturing graded channels underneath the gate electrode extensions

Monolithic semiconductor body with convex structure

Insulated gate field effect transistor having vertically layered elevated source/drain structure

FREESCALE SEMICONDUCTOR INC

Multi-channel transistor structure and method of making thereof

GeSOI transistor with low junction current and low junction capacitance and method for making the same

Method for forming a semiconductor device and structure thereof

Deposition and patterning of boron nitride nanotube ILD

Method for manufacturing a non-volatile memory, non-volatile memory device, and an integrated circuit

ORLOWSKI MARIUS

Intermediate product for a multichannel FET and process for obtaining an intermediate product

Method of forming an inverted T shaped channel structure for an inverted T channel field effect transistor device

Method of forming an inverted T shaped channel structure for an inverted T channel field effect transistor device

Resistive volatile/non-volatile floating electrode logic/memory cell

BRAECKELMANN GREG

Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure

Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure

Improvements for reducing electromigration effect in an integrated circuit

NDOYE COUMBA

Multiple exposure with image reversal in a single photoresist layer