Inventor

YANG WENGE

US33 patents

⚠️ This page may combine multiple inventors who share the name “YANG WENGE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG WENGE

ADVANCED MICRO DEVICES INC

Method for trimming a photoresist pattern line for memory gate etching

Method to produce small space pattern using plasma polymerization layer

Method for forming self-aligned contacts and local interconnects using decoupled local interconnect process

Method for forming self-aligned contacts and local interconnects for salicided gates using a secondary spacer

Semiconductor devices with reduced control gate dimensions

Method for etching memory gate stack using thin resist layer

Methods for treating a deep-UV resist mask prior to gate formation etch to improve gate profile

Method for etching layers on a semiconductor wafer in a single etching chamber

Method for removing anti-reflective coating layer using plasma etch process after contact CMP

Method for etching memory gate stack using thin resist layer

Methods and arrangements for forming a tapered floating gate in non-volatile memory semiconductor devices

Method of soft-landing gate etching to prevent gate oxide damage

Method for forming SAC using a dielectric as a BARC and FICD enlarger

Semiconductor manufacturing method using a dielectric photomask

Method for removing anti-reflective coating layer using plasma etch process before contact CMP

Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers

Method for forming self-aligned contacts and interconnection lines using dual damascene techniques

Method for using a low dielectric constant layer as a semiconductor anti-reflective coating

RTA methods for treating a deep-UV resist mask prior to gate formation etch to improve gate profile

Methods for removing silicide residue in a semiconductor device

Method and structure of etching a memory cell polysilicon gate layer using resist mask and etched silicon oxynitride

Method for preventing silicide residue formation in a semiconductor device

Method of high density plasma metal etching

Method and structure of etching a memory cell polysilicon gate layer using resist mask and etched silicon oxynitride

Method of fabricating a shallow trench isolation structure with reduced topography

Method for eliminating anti-reflective coating in semiconductors

Local interconnect etch characterization using AFM

Method for fabricating a conductive structure for a semiconductor device

Method for reducing the step height of shallow trench isolation structures

TIMBRE TECH INC

Combined optical profilometry and projection microscopy of integrated circuit structures

TOKYO ELECTRON LTD

Controlling critical dimensions of structures formed on a wafer in semiconductor processing

SPANSION LLC

Method of forming highly conductive semiconductor structures via plasma etch

HPSTAR BEIJING

Method for improving conductivity and blue light filtering efficiency of transparent conducting oxide (TCO)