Inventor

BELLORADO JASON

US119 patents

⚠️ This page may combine multiple inventors who share the name “BELLORADO JASON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BELLORADO JASON

SEAGATE TECHNOLOGY LLC

Multi-signal realignment for changing sampling clock

Head delay calibration and tracking in MSMR systems

MISO equalization with ADC averaging

Regularized parameter adaptation

Multi-stage MISO circuit for fast adaptation

Phase locking multiple clocks of different frequencies

Servo sector detection

Read channel buffer management for higher throughput decoding

Parallelized writing of servo RRO/ZAP fields

Sampling for multi-reader magnetic recording

Synchronous writing of patterned media

Data path dynamic range optimization

Dynamic timing recovery bandwidth modulation for phase offset mitigation

Head delay calibration and tracking in MSMR systems

Disc locked clock-based servo timing

Data path dynamic range optimization

Cancelling adjacent track interference

SK HYNIX INC

Threshold carrying for solid state storage

Data separation during garbage collection and wear leveling

High-speed low-power LDPC decoder design

Read disturb detection

Check after write for assessing wear related degradation in solid state storage

Syndrome tables for decoding turbo-product codes

Neighbor based and dynamic hot threshold based hot data identification

Miscorrection detection for error correcting codes using bit reliabilities

Selection of an open block in solid state storage systems with multiple open blocks

Efficient bin labeling schemes for tracking cells in solid state storage devices

Memory system and memory management method thereof

Decoding of turbo product codes using miscorrection detection

Parallel chien search with folding and a symbolized minimal polynomial combinational network (S-MPCN)

SK HYNIX MEMORY SOLUTIONS INC

Storage of read thresholds for NAND flash storage using linear approximation

Chase decoding for turbo-product codes (TPC) using error intersections

Workload-based adjustable cache size

Memory efficient triggers of read disturb checks in solid state storage

Stopping rules for turbo product codes

Prefetch with localities and performance monitoring

Generating soft read values which optimize dynamic range

Finding optimal read thresholds and related voltages for solid state memory

Generating read thresholds using gradient descent and without side information

Generating soft read values which optimize dynamic range

Generating soft read values using multiple reads and/or bins

Selective copy-back

BELLORADO JASON

Adjusting receiver parameters without known data

Generation of interpolated samples for decision based decoding

Inter-track interference cancelation for shingled magnetic recording

Write-precompensation and variable write backoff

WU ZHENG

Controlling preamble target amplitude

MARROW MARCUS

Blind and decision directed multi-level channel estimation

CHAN KAI KEUNG

Error data generation and application for disk drive applications

LEE FREDERICK K H

Soft input, soft ouput mappers and demappers for block codes