Inventor
KOSWATTA SIYURANGA O
US16 patents
⚠️ This page may combine multiple inventors who share the name “KOSWATTA SIYURANGA O”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS8609481B1Dec 17, 2013
Gate-all-around carbon nanotube transistor with selectively doped spacers
IBM26 citations92
US9000499B2Apr 7, 2015
Gate-all-around carbon nanotube transistor with selectively doped spacers
IBM13 citations84
US10224429B2Mar 5, 2019
Precise junction placement in vertical semiconductor devices using etch stop layers
IBM4 citations83
US10295589B2May 21, 2019
Electromigration wearout detection circuits
IBM3 citations73
US9614107B2Apr 4, 2017
Quantum capacitance graphene varactors and fabrication methods
IBM2 citations73
US11088278B2Aug 10, 2021
Precise junction placement in vertical semiconductor devices using etch stop layers
IBM1 citations72
US9954101B2Apr 24, 2018
Precise junction placement in vertical semiconductor devices using etch stop layers
IBM3 citations72
US11024750B2Jun 1, 2021
Quantum capacitance graphene varactors and fabrication methods
IBM0 citations62
US10636917B2Apr 28, 2020
Quantum capacitance graphene varactors and fabrication methods
IBM0 citations52
US10249754B2Apr 2, 2019
Precise junction placement in vertical semiconductor devices using etch stop layers
IBM0 citations51
GLOBALFOUNDRIES INC
4 patentsUS9773717B1Sep 26, 2017
Integrated circuits with peltier cooling provided by back-end wiring
GLOBALFOUNDRIES INC6 citations83
US10103083B2Oct 16, 2018
Integrated circuits with Peltier cooling provided by back-end wiring
GLOBALFOUNDRIES INC4 citations72
US9906213B2Feb 27, 2018
Reducing thermal runaway in inverter devices
GLOBALFOUNDRIES INC1 citations51
US9552455B2Jan 24, 2017
Method for an efficient modeling of the impact of device-level self-heating on electromigration limited current specifications
GLOBALFOUNDRIES INC1 citations51