Inventor
STUBER MICHAEL A
US85 patents
⚠️ This page may combine multiple inventors who share the name “STUBER MICHAEL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
PSEMI CORP
10 patentsUS10680600B2Jun 9, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP21 citations98
US10622990B2Apr 14, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP20 citations98
US10153763B2Dec 11, 2018
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP24 citations98
US10790815B2Sep 29, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP11 citations94
US10797691B1Oct 6, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP10 citations93
US10797690B2Oct 6, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP10 citations93
US10790814B2Sep 29, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP10 citations93
US10784855B2Sep 22, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PSEMI CORP10 citations93
US10797172B2Oct 6, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PSEMI CORP10 citations92
US10818796B2Oct 27, 2020
Method and apparatus improving gate oxide reliability by controlling accumulated charge
PSEMI CORP11 citations86
IO SEMICONDUCTOR INC
8 patentsUS8481405B2Jul 9, 2013
Trap rich layer with through-silicon-vias in semiconductor devices
IO SEMICONDUCTOR INC82 citations97
US8748245B1Jun 10, 2014
Semiconductor-on-insulator integrated circuit with interconnect below the insulator
IO SEMICONDUCTOR INC21 citations92
US8536021B2Sep 17, 2013
Trap rich layer formation techniques for semiconductor devices
IO SEMICONDUCTOR INC15 citations92
US8835281B2Sep 16, 2014
Methods for the formation of a trap rich layer
IO SEMICONDUCTOR INC8 citations84
US8357975B2Jan 22, 2013
Semiconductor-on-insulator with back side connection
IO SEMICONDUCTOR INC10 citations84
US8921168B2Dec 30, 2014
Thin integrated circuit chip-on-board assembly and method of making
IO SEMICONDUCTOR INC8 citations83
US8912646B2Dec 16, 2014
Integrated circuit assembly and method of making
IO SEMICONDUCTOR INC9 citations83
US8581398B2Nov 12, 2013
Trap rich layer with through-silicon-vias in semiconductor devices
IO SEMICONDUCTOR INC10 citations83
PEREGRINE SEMICONDUCTOR CORP
7 patentsUS7910993B2Mar 22, 2011
Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink
PEREGRINE SEMICONDUCTOR CORP280 citations99
US7890891B2Feb 15, 2011
Method and apparatus improving gate oxide reliability by controlling accumulated charge
PEREGRINE SEMICONDUCTOR CORP141 citations99
US9780775B2Oct 3, 2017
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PEREGRINE SEMICONDUCTOR CORP32 citations98
US9608619B2Mar 28, 2017
Method and apparatus improving gate oxide reliability by controlling accumulated charge
PEREGRINE SEMICONDUCTOR CORP35 citations98
US9130564B2Sep 8, 2015
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
PEREGRINE SEMICONDUCTOR CORP35 citations98
US6531739B2Mar 11, 2003
Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
PEREGRINE SEMICONDUCTOR CORP46 citations91
US7524710B2Apr 28, 2009
Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
PEREGRINE SEMICONDUCTOR CORP8 citations80
QUALCOMM INC
5 patentsUS9530796B2Dec 27, 2016
Semiconductor-on-insulator integrated circuit with interconnect below the insulator
QUALCOMM INC24 citations94
US9786613B2Oct 10, 2017
EMI shield for high frequency layer transferred devices
QUALCOMM INC11 citations84
US9647209B2May 9, 2017
Integrated phase change switch
QUALCOMM INC8 citations84
US9515139B2Dec 6, 2016
Trap rich layer formation techniques for semiconductor devices
QUALCOMM INC4 citations84
US9478507B2Oct 25, 2016
Integrated circuit assembly with faraday cage
QUALCOMM INC15 citations84
SILANNA SEMICONDUCTOR USA INC
5 patentsUS9159825B2Oct 13, 2015
Double-sided vertical semiconductor device with thinned substrate
SILANNA SEMICONDUCTOR USA INC18 citations92
US8928068B2Jan 6, 2015
Vertical semiconductor device with thinned substrate
SILANNA SEMICONDUCTOR USA INC8 citations84
US9064697B2Jun 23, 2015
Trap rich layer formation techniques for semiconductor devices
SILANNA SEMICONDUCTOR USA INC10 citations83
US8859347B2Oct 14, 2014
Semiconductor-on-insulator with back side body connection
SILANNA SEMICONDUCTOR USA INC12 citations83
US9153434B2Oct 6, 2015
Methods for the formation of a trap rich layer
SILANNA SEMICONDUCTOR USA INC8 citations79
QUALCOMM SWITCH CORP
3 patentsUS9362492B2Jun 7, 2016
Integrated phase change switch
QUALCOMM SWITCH CORP53 citations98
US9331098B2May 3, 2016
Semiconductor-on-insulator integrated circuit with reduced off-state capacitance
QUALCOMM SWITCH CORP16 citations92
US9368468B2Jun 14, 2016
Thin integrated circuit chip-on-board assembly
QUALCOMM SWITCH CORP7 citations82
STUBER MICHAEL A
3 patentsUS8954902B2Feb 10, 2015
Method and apparatus improving gate oxide reliability by controlling accumulated charge
STUBER MICHAEL A52 citations97
US8466054B2Jun 18, 2013
Thermal conduction paths for semiconductor structures
STUBER MICHAEL A19 citations91
US8232597B2Jul 31, 2012
Semiconductor-on-insulator with back side connection
STUBER MICHAEL A14 citations91
MOLIN STUART B
3 patentsUS8426888B2Apr 23, 2013
Vertical semiconductor device with thinned substrate
MOLIN STUART B25 citations92
US9034732B2May 19, 2015
Semiconductor-on-insulator with back side support layer
MOLIN STUART B8 citations83
US8426258B2Apr 23, 2013
Vertical semiconductor device with thinned substrate
MOLIN STUART B7 citations83
BRINDLE CHRISTOPHER N
2 patentsUS8405147B2Mar 26, 2013
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
BRINDLE CHRISTOPHER N58 citations98
US8129787B2Mar 6, 2012
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
BRINDLE CHRISTOPHER N101 citations98
SILANNA ASIA PTE LTD
2 patentsUS10083897B2Sep 25, 2018
Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact
SILANNA ASIA PTE LTD7 citations83
US9923059B1Mar 20, 2018
Connection arrangements for integrated lateral diffusion field effect transistors
SILANNA ASIA PTE LTD11 citations83
BRINDLE CHRIS
1 patentNYGAARD PAUL A
1 patentShowing the top 50 of 85 patents by PatentIndex Score.