Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink

Abstract

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOT MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

What is claimed is: 
     
       1. An RF switch, comprising:
 a first RF port; 
 a second RF port; 
 a first switch transistor grouping coupled with the first and second RF ports, and controlled by a first switch control signal, the first switch transistor grouping comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; 
 a shunt transistor grouping coupled with the first RF port and with ground, and controlled by a shunt control signal, the shunt transistor grouping comprising a plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the plurality of shunt NMOSFETs comprises a first body and a first accumulated charge sink (ACS) coupled with the first body and is configured so that when the at least one shunt NMOSFET is disabled, a first negative bias voltage that is substantially negative with respect to ground applied to the first ACS substantially prevents accumulated charge from accumulating in the first body of the at least one shunt NMOSFET, and wherein the at least one shunt NMOSFET includes a gate, drain, source, and a gate oxide layer positioned between the gate and the first body, and wherein accumulated charge will accumulate within the first body in a region proximate the gate oxide layer if the first ACS is not properly biased to prevent accumulated charge from accumulating in the first body; and 
 a silicon-on-insulator substrate, wherein the first switch transistor grouping and the shunt transistor grouping are fabricated in a silicon layer of the silicon-on-insulator substrate so that when the first switch transistor grouping is enabled by the first switch control signal and the shunt transistor grouping is disabled by the shunt control signal, the first RF port is electrically coupled to the second RF port, and when the first switch transistor grouping is disabled by the first switch control signal and the shunt transistor grouping is enabled by the shunt control signal, the first RF port is grounded. 
 
     
     
       2. The RF switch of  claim 1 , wherein at least one of the first plurality of switch NMOSFETs has a second body and a second accumulated charge sink (ACS) coupled with the second body and is configured so that when the at least one switch NMOSFET is disabled, a second negative bias voltage that is substantially negative with respect to ground applied to the second ACS substantially prevents accumulated charge from accumulating in the second body of the at least one switch NMOSFET. 
     
     
       3. The RF switch of  claim 2 , wherein the at least one switch NMOSFET includes a gate, and wherein the gate of the at least one switch NMOSFET and the second ACS are coupled together and also coupled with the first switch control signal. 
     
     
       4. The RF switch of  claim 2 , wherein the at least one shunt NMOSFET includes a gate, and wherein the gate of the at least one shunt NMOSFET and the first ACS are coupled together and also coupled with the shunt control signal. 
     
     
       5. The RF switch of  claim 2 , wherein the at least one switch NMOSFET includes a gate, and wherein a diode is coupled between the at least one switch NMOSFET gate and the second ACS such that the diode prevents current flow into the second body when the at least one switch NMOSFET is enabled. 
     
     
       6. The RF switch of  claim 2 , wherein the at least one shunt NMOSFET includes a gate, and wherein a diode is coupled between the at least one shunt NMOSFET gate and the first ACS such that the diode prevents current flow into the first body when the at least one shunt NMOSFET is enabled. 
     
     
       7. The RF switch of  claim 2 , wherein the at least one switch NMOSFET includes a gate, and wherein an electrical device is coupled between the gate and the second ACS such that the electrical device prevents current flow into the second body when the at least one switch NMOSFET is enabled. 
     
     
       8. The RF switch of  claim 2 , wherein the at least one shunt NMOSFET includes a gate, and wherein an electrical device is coupled between the gate and the first ACS such that the electrical device prevents current flow into the first body when the at least one shunt NMOSFET is enabled. 
     
     
       9. The RF switch of  claim 2 , wherein the first and second negative bias voltages are substantially more negative than the lowest voltage value of ground, a threshold voltage (Vth), a source voltage (Vs), and a drain voltage (Vd). 
     
     
       10. The RF switch of  claim 2 , wherein the first and second negative bias voltages are at least one volt more negative than the lowest voltage value of ground, a threshold voltage (Vth), a source voltage (Vs), and a drain voltage (Vd). 
     
     
       11. The RF switch of  claim 2 , wherein each NMOSFET has an associated and respective gate voltage Vg, and wherein the associated gate voltage is at least one volt more negative than the lowest voltage value of ground, a threshold voltage (Vth), a source voltage (Vs), and a drain voltage (Vd). 
     
     
       12. The RF switch of  claim 2 , further comprising:
 a third RF port; and 
 a second switch transistor grouping coupled with the second and third RF ports wherein the second switch transistor grouping comprises a second plurality of switch NMOSFETs arranged in a stacked configuration, wherein at least one of the second plurality of switch NMOSFETs has a third body and a third accumulated charge sink (ACS) coupled to the third body and is configured so that when the at least one switch NMOSFET of the second plurality of switch NMOSFETs is disabled, a third negative bias voltage that is substantially negative with respect to ground applied to the third ACS substantially prevents accumulated charge from accumulating in the third body. 
 
     
     
       13. The RF switch of  claim 12 , wherein preventing accumulated charge from accumulating in the third body of the at least one switch NMOSFET improves linearity of the signal passed through to the second RF port. 
     
     
       14. The RF switch of  claim 1 , wherein the shunt transistor grouping comprises at least three NMOSFETs. 
     
     
       15. The RF switch of  claim 1 , wherein the shunt transistor grouping comprises at least six NMOSFETs. 
     
     
       16. The RF switch of  claim 1 , wherein the shunt transistor grouping comprises at least nine NMOSFETs. 
     
     
       17. The RF switch of  claim 2 , wherein the first switch transistor grouping comprises at least three NMOSFETs. 
     
     
       18. The RF switch of  claim 2 , wherein the first switch transistor grouping comprises at least six NMOSFETs. 
     
     
       19. The RF switch of  claim 2 , wherein the first switch transistor grouping comprises at least nine NMOSFETs. 
     
     
       20. The RF switch of  claim 2 , wherein the first switch transistor grouping comprises at least twelve NMOSFETs. 
     
     
       21. The RF switch of  claim 2 , wherein the first switch transistor grouping comprises at least fifteen NMOSFETs. 
     
     
       22. The RF switch of  claim 12 , wherein the second switch transistor grouping comprises at least three NMOSFETs. 
     
     
       23. The RF switch of  claim 12 , wherein the second switch transistor grouping comprises at least six NMOSFETs. 
     
     
       24. The RF switch of  claim 12 , wherein the second switch transistor grouping comprises at least nine NMOSFETs. 
     
     
       25. The RF switch of  claim 12 , wherein the second transistor grouping comprises at least twelve NMOSFETs. 
     
     
       26. The RF switch of  claim 12 , wherein the second switch transistor grouping comprises at least fifteen NMOSFETs. 
     
     
       27. The RF switch of  claim 2 , wherein the at least one shunt NMOSFET further comprises an electrical contact region proximate to the first ACS, and wherein the electrical contact region facilitates coupling to the first body. 
     
     
       28. The RF switch of  claim 2 , wherein the at least one switch NMOSFET further comprises an electrical contact region proximate to the second ACS, and wherein the electrical contact region facilitates coupling to the second body. 
     
     
       29. The RF switch of  claim 12 , wherein the at least one second switch NMOSFET further comprises an electrical contact region proximate to the third ACS, and wherein the electrical contact region facilitates coupling to the third body. 
     
     
       30. The RF switch according to  claim 1 ,  2  or  12 , wherein the switch and shunt control signals enabling the NMOSFETs have a voltage of approximately +2.5 Volts. 
     
     
       31. The RF switch according to  claim 1 ,  2 , or  12 , wherein the switch and shunt control signals disabling the NMOSFETs have a voltage of approximately −2.5 Volts. 
     
     
       32. The RF switch according to  claim 1 ,  2 , or  12 , wherein the NMOSFETs comprise partially depleted NMOSFETs. 
     
     
       33. The RF switch according to  claim 1 ,  2 , or  12 , wherein the NMOSFETs comprise fully depleted NMOSFETs. 
     
     
       34. A circuit routing RE signals, comprising:
 a first RF port; 
 a second RF port; 
 a third RF port; 
 a plurality of stacked shunt NMOSFETs coupled with the first RF port and ground, and controlled by a shunt control signal, wherein at least one of the plurality of stacked shunt NMOSFETs comprises a first body and a first accumulated charge sink (ACS) coupled with the first body and is configured so that when the at least one shunt NMOSFET is disabled, a first negative bias voltage that is substantially negative with respect to ground applied to the first ACS substantially prevents accumulated charge from accumulating in the first body of the at least one shunt NMOSFET ,and wherein the at least one shunt NMOSFET includes a gate, drain, source, and a gate oxide layer positioned between the gate and the first body, and wherein accumulated charge will accumulate within the first body in a region proximate the gate oxide layer if the first ACS is not properly biased to prevent accumulated charge from accumulating in the first body; 
 a first plurality of first stacked switch NMOSFETs coupled with the first and second RF ports, and controlled by a first switch control signal, wherein at least one of the first plurality of first switch NMSOFETs has a second body and a second accumulated charge sink (ACS) coupled with the second body and is configured so that when the at least one first switch NMOSFET is disabled, a second negative bias voltage that is substantially negative with respect to ground applied to the second ACS substantially prevents accumulated charge from accumulating in the second body of the at least one first switch NMOSFET; 
 a second plurality of second stacked switch NMOSFETs coupled with the second and third RF ports, wherein at least one of the second plurality of second switch NMOSFETs has a third body and a third accumulated charge sink (ACS) coupled to the third body and configured so that when the at least one second switch NMOSFET is disabled, a third negative bias voltage that is substantially negative with respect to ground applied to the third ACS substantially prevents accumulated charge from accumulating in the third body; and 
 a silicon-on-insulator substrate, wherein the shunt, first switch and second switch NMOSFETs are fabricated in a silicon layer of the silicon-on-insulator substrate. 
 
     
     
       35. The circuit of  claim 34 , wherein when the first switch NMOSFETs are enabled by the first switch control signal, the shunt NMOSFETs are disabled by the shunt control signal and the at least one second switch NMOSFET is disabled, an RF signal on the first RF port is passed through to the second RF port, and wherein preventing accumulated charge from accumulating in the third body of the at least one second switch NMOSFET improves linearity of the RF signal passed through to the second RF port. 
     
     
       36. A method for substantially preventing accumulated charge from accumulating in an RF switching circuit comprising:
 coupling a first plurality of series connected switching NMOSFETs between a first RF port and a second RF port, each switching NMOSFET of the first plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs has a first accumulated charge sink (ACS) coupled with the body of the at least one switching NMOSFET; 
 coupling a first plurality of series connected shunting NMOSFETs between the first RF port and ground, each shunting NMOSFET of the first plurality of series connected shunting NMOSFETs having a gate and a body, wherein at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs has a second accumulated charge sink (ACS) coupled with the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs ,and wherein the at least one shunting NMOSFET further includes a, drain, source, and a gate oxide layer positioned between the gate and the body of the at least one shunting NMOSFET, and wherein accumulated charge will accumulate within the body of the at least one shunting NMOSFET in a region proximate the gate oxide layer if the second ACS is not properly biased to prevent accumulated char e from accumulatin in the bod of the at least one shunting NMOSFET; 
 applying a first bias voltage to the gates of the first plurality of series connected switching NMOSFETs that is greater than a first threshold voltage, wherein the first plurality of series connected switching NMOSFETs are enabled and the first RF port is electrically coupled to the second RF port; 
 applying a second bias voltage to the gates of the first plurality of series connected shunting NMOSFETs that is less than a second threshold voltage, wherein the first plurality of series connected shunting NMOSFETs are disabled; and 
 applying a third bias voltage to the second ACS of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs when the first plurality of series connected shunting NMOSFETs are disabled, wherein the third bias voltage is substantially negative with respect to ground and wherein the application of the third bias voltage to the second ACS substantially prevents accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs. 
 
     
     
       37. A method for substantially preventing accumulated charge from accumulating in an RF switching circuit comprising:
 coupling a first plurality of series connected switching NMOSFETs between a first RF port and a second RF port, each switching NMOSFET having a gate and a body, wherein at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs has a first accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs,and wherein the at least one switching NMOSFET further includes a drain, source, and a gate oxide layer positioned between the at least one switching NMOSFET gate and the body of the at least one switching NMOSFET, and wherein accumulated charge will accumulate within the body of the at least one switching NMOSFET in a region proximate the gate oxide layer if the first ACS is not properly biased to prevent accumulated charge from accumulating in the body of the at least one switching NMOSFET; 
 coupling a first plurality of series connected shunting NMOSFETs between the first RF port and ground, each shunting NMOSFET of the first plurality of series connected shunting NMOSFETs having a gate and a body, wherein at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs has a second accumulated charge sink (ACS) coupled with the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs; 
 applying a first bias voltage to the gates of the first plurality of series connected switching NMOSFETs that is greater than a first threshold voltage, wherein the first plurality of series connected switching NMOSFETs are enabled and the first RF port is electrically coupled to the second RF port; 
 applying a second bias voltage to the gates of the first plurality of series connected shunting NMOSFETs that is less than a second threshold voltage, wherein the first plurality of series connected shunting NMOSFETs are disabled; and 
 applying a third bias voltage to the second ACS of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs when the first plurality of series connected shunting NMOSFETs are disabled, wherein the third bias voltage is substantially negative with respect to ground and wherein the application of the third bias voltage to the second ACS substantially prevents accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs, and wherein linearity of an RF signal passed from the first RF port to the second RF port is improved by substantially preventing accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs. 
 
     
     
       38. The method of  claim 36 , further comprising:
 coupling a second plurality of series connected switching NMOSFETs between the second RF port and a third RF port, each switching NMOSFET of the second plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs has a accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs; 
 applying a fourth bias voltage to the gates of the second plurality of series connected switching NMOSFETs that is less than a third threshold voltage, wherein the second plurality of series connected switching NMOSFETs are disabled; and 
 applying a fifth bias voltage to the third ACS when the second plurality of series connected switching NMOSFETs are disabled, wherein the fifth bias voltage is substantially negative with respect to ground, and wherein the application of the fifth bias voltage to the third ACS substantially prevents accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs. 
 
     
     
       39. The method of  claim 37 , further comprising:
 coupling a second plurality of series connected switching NMOSFETs between the second RF port and a third RF port, each switching NMOSFET of the second plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs has a third accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs; 
 applying a fourth bias voltage to the gates of the second plurality of series connected switching NMOSFETs that is less than a third threshold voltage, wherein the second plurality of series connected switching NMOSFETs are disabled; and 
 applying a fifth bias voltage to the third ACS when the second plurality of series connected switching NMOSFETs are disabled, wherein the fifth bias voltage is substantially negative with respect to ground, and wherein the application of the fifth bias voltage to the third ACS substantially prevents accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs. 
 
     
     
       40. The method of  claim 36 , further comprising:
 coupling a second plurality of series connected switching NMOSFETs between the second and a third RF port, each switching NMOSFET of the second plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs has a third accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs; 
 applying a fourth bias voltage to the gates of the second plurality of series connected switching NMOSFETs that is less than a third threshold voltage, wherein the second plurality of series connected switching NMOSFETs are disabled; and 
 applying a fifth bias voltage to the third ACS of the at least one of the second plurality of series connected switching NMOSFETs when the second plurality of series connected switching NMOSFETs are disabled, wherein the fifth bias voltage is substantially negative with respect to ground and wherein the application of the fifth bias voltage to the third ACS substantially prevents accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs, and wherein linearity of an RF signal passed from the first RF port to the second RF port is improved by substantially preventing accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs. 
 
     
     
       41. The method of  claim 37 , further comprising:
 coupling a second plurality of series connected switching NMOSFETs between the second RF port and a third RF port, each switching NMOSFET of the second plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs has a third accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs; 
 applying a fourth bias voltage to the gates of the second plurality of series connected switching NMOSFETs that is less than a third threshold voltage, wherein the second plurality of series connected switching NMOSFETs are disabled; and 
 applying a fifth bias voltage to the third ACS of the at least one of the second plurality of series connected switching NMOSFETs when the second plurality of series connected switching NMOSFETs are disabled, wherein the fifth bias voltage is substantially negative with respect to ground and wherein the application of the fifth bias voltage to the third ACS substantially prevents accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs, and wherein linearity of an RF signal passed from the first RF port to the second RF port is improved by substantially preventing accumulated charge from accumulating in the body of the at least one switching NMOSFET of the second plurality of series connected switching NMOSFETs.