P

Inventor

KONG DEXIN

CN54 patents

Patents

50 patents
US10714569B1Jul 14, 2020

Producing strained nanosheet field effect transistors using a phase change material

IBM12 citations86
US10658583B1May 19, 2020

Forming RRAM cell structure with filament confinement

IBM8 citations84
US10615288B1Apr 7, 2020

Integration scheme for non-volatile memory on gate-all-around structure

IBM7 citations84
US11195755B2Dec 7, 2021

Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors

IBM2 citations73
US11101323B2Aug 24, 2021

RRAM cells in crossbar array architecture

IBM2 citations73
US11011704B2May 18, 2021

Forming RRAM cell structure with filament confinement

IBM3 citations73
US10903421B2Jan 26, 2021

Controlling filament formation and location in a resistive random-access memory device

IBM3 citations73
US10749040B2Aug 18, 2020

Integration scheme for non-volatile memory on gate-all-around structure

IBM3 citations73
US10692203B2Jun 23, 2020

Measuring defectivity by equipping model-less scatterometry with cognitive machine learning

IBM3 citations73
US10686014B2Jun 16, 2020

Semiconductor memory device having a vertical active region

IBM2 citations73
US10559625B1Feb 11, 2020

RRAM cells in crossbar array architecture

IBM3 citations73
US11199505B2Dec 14, 2021

Machine learning enhanced optical-based screening for in-line wafer testing

IBM2 citations70
US12453293B2Oct 21, 2025

Redundant bottom pad and sacrificial via contact for process induced RRAM forming

IBM0 citations63
US12310262B2May 20, 2025

Phase change memory with encapsulated phase change element

IBM0 citations63
US12256653B2Mar 18, 2025

PCM cell with nanoheater surrounded with airgaps

IBM0 citations63
US12033061B2Jul 9, 2024

Capacitor-based synapse network structure with metal shielding between outputs

IBM0 citations63
US11937522B2Mar 19, 2024

Confining filament at pillar center for memory devices

IBM0 citations63
US11877524B2Jan 16, 2024

Nanotip filament confinement

IBM0 citations63
US11812675B2Nov 7, 2023

Filament confinement in resistive random access memory

IBM0 citations63
US11682582B2Jun 20, 2023

Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors

IBM0 citations63
US11430513B1Aug 30, 2022

Non-volatile memory structure and method for low programming voltage for cross bar array

IBM1 citations63
US11362093B2Jun 14, 2022

Co-integration of non-volatile memory on gate-all-around field effect transistor

IBM0 citations63
US11183636B2Nov 23, 2021

Techniques for forming RRAM cells

IBM0 citations63
US11121318B2Sep 14, 2021

Tunable forming voltage for RRAM device

IBM1 citations63
US11101322B2Aug 24, 2021

RRAM cells in crossbar array architecture

IBM0 citations63
US11075200B2Jul 27, 2021

Integrated device with vertical field-effect transistors and hybrid channels

IBM0 citations63
US11043634B2Jun 22, 2021

Confining filament at pillar center for memory devices

IBM0 citations63
US11004751B2May 11, 2021

Vertical transistor having reduced edge fin variation

IBM0 citations63
US10998229B2May 4, 2021

Transistor with improved self-aligned contact

IBM1 citations63
US10971549B2Apr 6, 2021

Semiconductor memory device having a vertical active region

IBM0 citations63
US12310267B2May 20, 2025

ReRAM module with intermediate electrode

IBM0 citations62
US12225833B2Feb 11, 2025

Oxide-based resistive memory having a plasma-exposed bottom electrode

IBM0 citations62
US11856878B2Dec 26, 2023

High-density resistive random-access memory array with self-aligned bottom electrode contact

IBM0 citations62
US11751492B2Sep 5, 2023

Embedded memory pillar

IBM0 citations62
US11647680B2May 9, 2023

Oxide-based resistive memory having a plasma-exposed bottom electrode

IBM0 citations62
US11665987B2May 30, 2023

Integrated switch using stacked phase change materials

IBM0 citations52
US11270768B2Mar 8, 2022

Failure prevention of chip power network

IBM0 citations52
US11239421B2Feb 1, 2022

Embedded BEOL memory device with top electrode pillar

IBM0 citations52
US11221359B2Jan 11, 2022

Determining device operability via metal-induced layer exchange

IBM0 citations52
US11195754B2Dec 7, 2021

Transistor with reduced gate resistance and improved process margin of forming self-aligned contact

IBM0 citations52
US11189724B2Nov 30, 2021

Method of forming a top epitaxy source/drain structure for a vertical transistor

IBM0 citations52
US10886367B2Jan 5, 2021

Forming FinFET with reduced variability

IBM0 citations52
US10804274B2Oct 13, 2020

Co-integration of non-volatile memory on gate-all-around field effect transistor

IBM0 citations52
US10784380B2Sep 22, 2020

Gate-all-around transistor based non-volatile memory devices

IBM0 citations52
US10763118B2Sep 1, 2020

Cyclic selective deposition for tight pitch patterning

IBM0 citations52
US10707127B2Jul 7, 2020

Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors

IBM0 citations52
US10679992B1Jun 9, 2020

Integrated device with vertical field-effect transistors and hybrid channels

IBM0 citations52
US10658590B2May 19, 2020

Techniques for forming RRAM cells

IBM0 citations52
US10586875B2Mar 10, 2020

Gate-all-around transistor based non-volatile memory devices

IBM0 citations52
US11956975B2Apr 9, 2024

BEOL fat wire level ground rule compatible embedded artificial intelligence integration

IBM0 citations51

Showing the top 50 of 54 patents by PatentIndex Score.