Inventor
PRITCHARD DAVID
US54 patents
⚠️ This page may combine multiple inventors who share the name “PRITCHARD DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
12 patentsUS9224617B2Dec 29, 2015
Forming cross-coupled line segments
GLOBALFOUNDRIES INC13 citations83
US10529704B1Jan 7, 2020
Auxiliary gate antenna diodes
GLOBALFOUNDRIES INC7 citations82
US10727108B2Jul 28, 2020
Dummy gate isolation and method of production thereof
GLOBALFOUNDRIES INC2 citations72
US10347543B2Jul 9, 2019
FDSOI semiconductor device with contact enhancement layer and method of manufacturing
GLOBALFOUNDRIES INC4 citations72
US9465907B2Oct 11, 2016
Multi-polygon constraint decomposition techniques for use in double patterning applications
GLOBALFOUNDRIES INC3 citations70
US9472455B2Oct 18, 2016
Methods of cross-coupling line segments on a wafer
GLOBALFOUNDRIES INC2 citations61
US9436081B2Sep 6, 2016
Methods of modifying masking reticles to remove forbidden pitch regions thereof
GLOBALFOUNDRIES INC0 citations52
US9666488B1May 30, 2017
Pass-through contact using silicide
GLOBALFOUNDRIES INC0 citations51
US10186524B2Jan 22, 2019
Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions
GLOBALFOUNDRIES INC0 citations50
US9941301B1Apr 10, 2018
Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions
GLOBALFOUNDRIES INC0 citations50
US10181522B2Jan 15, 2019
Simplified gate to source/drain region connections
GLOBALFOUNDRIES INC0 citations49
US10651136B2May 12, 2020
Technique for decoupling plasma antennae from actual circuitry
GLOBALFOUNDRIES INC0 citations44
GLOBALFOUNDRIES US INC
11 patentsUS11610843B2Mar 21, 2023
Well tap for an integrated circuit product and methods of forming such a well tap
GLOBALFOUNDRIES US INC2 citations71
US12464784B2Nov 4, 2025
Isolation structures of semiconductor devices
GLOBALFOUNDRIES US INC0 citations63
US12513995B2Dec 30, 2025
Substrates of semiconductor devices having varying thicknesses of semiconductor layers
GLOBALFOUNDRIES US INC0 citations62
US12356675B2Jul 8, 2025
Planar transistor device comprising at least one layer of a two-dimensional (2D) material
GLOBALFOUNDRIES US INC0 citations60
US11581430B2Feb 14, 2023
Planar transistor device comprising at least one layer of a two-dimensional (2D) material and methods for making such transistor devices
GLOBALFOUNDRIES US INC0 citations60
US11177182B2Nov 16, 2021
Vertical transistor device comprising a two-dimensional (2D) material positioned in a channel region of the device and methods of making such vertical transistor devices
GLOBALFOUNDRIES US INC1 citations60
US11276651B2Mar 15, 2022
IC product comprising a single active fin FinFET device and an electrically inactive fin stress reduction structure
GLOBALFOUNDRIES US INC1 citations57
US12424493B2Sep 23, 2025
Self-aligned double patterning with mandrel manipulation
GLOBALFOUNDRIES US INC0 citations55
US12364000B1Jul 15, 2025
Device structures for a high-voltage semiconductor device
GLOBALFOUNDRIES US INC0 citations52
US12464745B2Nov 4, 2025
Bipolar junction transistor arrays
GLOBALFOUNDRIES US INC0 citations51
US11094791B1Aug 17, 2021
Vertical transistor device with source/drain regions comprising a twi-dimensional (2D) material and methods of making such vertical transistor devices
GLOBALFOUNDRIES US INC0 citations50
BANK OF AMERICA
4 patentsUS7283935B1Oct 16, 2007
Method and apparatus for monitoring grid-based computing resources
BANK OF AMERICA29 citations86
US11252160B1Feb 15, 2022
Artificial intelligence software access bundling
BANK OF AMERICA1 citations55
US11785015B2Oct 10, 2023
Information security system for detecting unauthorized access requests
BANK OF AMERICA1 citations51
US11755927B2Sep 12, 2023
Identifying entitlement rules based on a frequent pattern tree
BANK OF AMERICA0 citations45
GAINSBOROUGH HARDWARE IND LTD
4 patentsLSI LOGIC CORP
3 patentsUS6562700B1May 13, 2003
Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal
LSI LOGIC CORP57 citations91
US7361965B2Apr 22, 2008
Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design
LSI LOGIC CORP2 citations62
US7582566B2Sep 1, 2009
Method for redirecting void diffusion away from vias in an integrated circuit design
LSI LOGIC CORP0 citations51
BRISTOL MYERS SQUIBB CO
3 patentsUS6140257AOct 31, 2000
Composite fibres, wound dressings incorporating such fibres and a method for making same
BRISTOL MYERS SQUIBB CO23 citations91
US5925009AJul 20, 1999
Alginate fabric, method of preparation and use
BRISTOL MYERS SQUIBB CO30 citations91
US5914124AJun 22, 1999
Alginate fibre, process for the preparation thereof and use
BRISTOL MYERS SQUIBB CO38 citations90
LSI CORP
3 patentsUS7955919B2Jun 7, 2011
Spacer-less transistor integration scheme for high-K gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe and strained silicon schemes
LSI CORP8 citations83
US7436040B2Oct 14, 2008
Method and apparatus for diverting void diffusion in integrated circuit conductors
LSI CORP2 citations62
US7259083B2Aug 21, 2007
Local interconnect manufacturing process
LSI CORP5 citations60
QIMONDA AG
3 patentsUS7678654B2Mar 16, 2010
Buried bitline with reduced resistance
QIMONDA AG2 citations60
US8018070B2Sep 13, 2011
Semiconductor device, method for manufacturing semiconductor devices and mask systems used in the manufacturing of semiconductor devices
QIMONDA AG4 citations56
US8021933B2Sep 20, 2011
Integrated circuit including structures arranged at different densities and method of forming the same
QIMONDA AG1 citations51
ROLLS ROYCE PLC
2 patentsRAI STRATEGIC HOLDINGS INC
2 patentsSINGH HARDEV
1 patentREFLEX INSTR ASIA PACIFIC PTY LTD
1 patentDEHAL PRABHJYOT
1 patentShowing the top 50 of 54 patents by PatentIndex Score.