Inventor

BOEHM AARON P

US126 patents

⚠️ This page may combine multiple inventors who share the name “BOEHM AARON P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BOEHM AARON P

MICRON TECHNOLOGY INC

Internal error correction for memory devices

Memory pooling between selected memory resources

Host verification for a memory device

Apparatuses and methods for ordering bits in a memory device

Apparatuses and methods for organizing data in a memory device

Apparatuses and methods for ordering bits in a memory device

Apparatuses and methods for organizing data in a memory device

Error correction memory device with fast data access

Command address fault detection using a parity pin

Techniques for detecting a state of a bus

Coordinated error protection

Security techniques for low power mode of memory device

Coordinated error correction

Apparatuses and methods for ordering bits in a memory device

Memory device with status feedback for error correction

Apparatuses and methods for organizing data in a memory device

Extended error detection for a memory device

Command block management

Refresh counters in a memory system

Internal error correction for memory devices

Method and device capable of executing instructions remotely in accordance with multiple logic units

Memory pooling between selected memory resources on vehicles or base stations

Wirelessly utilizable memory

Memory device with status feedback for error correction

Targeted command/address parity low lift

Methods and devices for error correction

Error correction management for a memory device

Scrub rate control for a memory device

Memory device with configurable error correction modes

Extended error detection for a memory device

Row hammer protection for a memory device

Sharing a memory resource among physically remote entities

Remotely executable instructions

Wirelessly utilizable memory

Determination of a match between data values stored by several arrays

Evaluation of memory device health monitoring logic

Temperature monitoring for memory devices

Techniques for error detection and correction in a memory system

Monitoring and adjusting access operations at a memory device

Adaptive user defined health indication

Memory error indicator for high-reliability applications

Current monitor for a memory device

Managing error control information using a register

Coordinated error protection

Techniques for detecting a state of a bus

LODESTAR LICENSING GROUP LLC

Coordinated error correction

Scrub rate control for a memory device

Internal error correction for memory devices

Methods and devices for error correction

Data center using a memory pool between selected memory resources